6 Commits (9c8881cb3534b257d6e6539f563006599cd96b48)

Author SHA1 Message Date
Rémi Denis-Courmont 01c5f4ad9f riscv: add Zvbb vector bit manipulation extension 10 months ago
Rémi Denis-Courmont b3825bbe45 riscv: test for assembler support 1 year ago
Rémi Denis-Courmont 1b6aee52a5 configure: probe RISC-V Vector extension 2 years ago
Shiyou Yin 9a840ffa17 avutil: [loongarch] Add support for loongarch SIMD. 3 years ago
Diego Biurrun fd502f4f5f build: Generalize yasm/nasm-related variable names 8 years ago