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${ noResults }
13 Commits (9bcbe04aa0abb6b09b687f6e63c391b13503ffff)
Author | SHA1 | Message | Date |
---|---|---|---|
Martin Storsjö | 86519234b8 |
arm: vc1dsp: Canonicalize the syntax for aligned NEON loads/stores
This hopefully should fix building with older toolchains, hopefully fixing the fate failures on http://fate.ffmpeg.org/history.cgi?slot=armel5tej-qemu-debian-gcc4.4. Signed-off-by: Martin Storsjö <martin@martin.st> |
2 years ago |
Ben Avison | 23c92e14f5 |
avcodec/vc1: Arm 32-bit NEON unescape fast path
checkasm benchmarks on 1.5 GHz Cortex-A72 are as follows. vc1dsp.vc1_unescape_buffer_c: 918624.7 vc1dsp.vc1_unescape_buffer_neon: 142958.0 Signed-off-by: Ben Avison <bavison@riscosopen.org> Signed-off-by: Martin Storsjö <martin@martin.st> |
3 years ago |
Ben Avison | c07de58a72 |
avcodec/vc1: Arm 32-bit NEON deblocking filter fast paths
checkasm benchmarks on 1.5 GHz Cortex-A72 are as follows. Note that the C version can still outperform the NEON version in specific cases. The balance between different code paths is stream-dependent, but in practice the best case happens about 5% of the time, the worst case happens about 40% of the time, and the complexity of the remaining cases fall somewhere in between. Therefore, taking the average of the best and worst case timings is probably a conservative estimate of the degree by which the NEON code improves performance. vc1dsp.vc1_h_loop_filter4_bestcase_c: 19.0 vc1dsp.vc1_h_loop_filter4_bestcase_neon: 48.5 vc1dsp.vc1_h_loop_filter4_worstcase_c: 144.7 vc1dsp.vc1_h_loop_filter4_worstcase_neon: 76.2 vc1dsp.vc1_h_loop_filter8_bestcase_c: 41.0 vc1dsp.vc1_h_loop_filter8_bestcase_neon: 75.0 vc1dsp.vc1_h_loop_filter8_worstcase_c: 294.0 vc1dsp.vc1_h_loop_filter8_worstcase_neon: 102.7 vc1dsp.vc1_h_loop_filter16_bestcase_c: 54.7 vc1dsp.vc1_h_loop_filter16_bestcase_neon: 130.0 vc1dsp.vc1_h_loop_filter16_worstcase_c: 569.7 vc1dsp.vc1_h_loop_filter16_worstcase_neon: 186.7 vc1dsp.vc1_v_loop_filter4_bestcase_c: 20.2 vc1dsp.vc1_v_loop_filter4_bestcase_neon: 47.2 vc1dsp.vc1_v_loop_filter4_worstcase_c: 164.2 vc1dsp.vc1_v_loop_filter4_worstcase_neon: 68.5 vc1dsp.vc1_v_loop_filter8_bestcase_c: 43.5 vc1dsp.vc1_v_loop_filter8_bestcase_neon: 55.2 vc1dsp.vc1_v_loop_filter8_worstcase_c: 316.2 vc1dsp.vc1_v_loop_filter8_worstcase_neon: 72.7 vc1dsp.vc1_v_loop_filter16_bestcase_c: 62.2 vc1dsp.vc1_v_loop_filter16_bestcase_neon: 103.7 vc1dsp.vc1_v_loop_filter16_worstcase_c: 646.5 vc1dsp.vc1_v_loop_filter16_worstcase_neon: 110.7 Signed-off-by: Ben Avison <bavison@riscosopen.org> Signed-off-by: Martin Storsjö <martin@martin.st> |
3 years ago |
Martin Storsjö | ab05d3934d |
arm: vc1dsp: Add commas between macro arguments
When targeting darwin, clang requires commas between arguments, while the no-comma form is allowed for other targets. Since Xcode 9.3, the bundled clang supports altmacro and doesn't require using gas-preprocessor any longer. Signed-off-by: Martin Storsjö <martin@martin.st> |
7 years ago |
Martin Storsjö | d7320ca3ed |
arm: Avoid using .dn register aliases
clang now (in the upcoming 5.0 version) is capable of building our
arm assembly without relying on gas-preprocessor, although clang/LLVM
doesn't support .dn register aliases.
The VC1 MC assembly was only built and used if the chosen assembler
supported the .dn directives though. This was supported as long as
gas-preprocessor was used.
This means that VC1 decoding got a speed regression on clang 5.0,
unless the user manually chose using gas-preprocessor again.
By avoiding using the .dn register aliases, we can build the VC1 MC
assembly with the latest clang version.
Support for the .dn/.qn directives in clang/LLVM isn't actively planned,
see https://bugs.llvm.org/show_bug.cgi?id=18199.
This partially reverts
|
8 years ago |
Diego Biurrun | 2ec9fa5ec6 |
idct: Change type of array stride parameters to ptrdiff_t
ptrdiff_t is the correct type for array strides and similar. |
8 years ago |
Janne Grunau | 896a5bff64 |
arm: check if AS supports .dn
Move the GNU as check before the arch specific asm checks since the .dn check requires gas compatible assembler. Disable the VC-1 motion compensation NEON asm which is the only part using that directive. The integrated assembler in the upcoming clang 3.5 does not support .dn/.qn without plans to change that. Too much effort to implement it while it is rarely used. http://llvm.org/bugs/show_bug.cgi?id=18199. |
11 years ago |
Mason Carter | 832e190632 |
vc1: arm: Add NEON assembly
For: ff_vc1_inv_trans_{8,4}x{8,4}_{dc_,}neon ff_put_pixels8x8_neon ff_put_vc1_mspel_mc{0,1,2,3}{0,1,2,3}_neon (except for 00) Based on ARM assembly code in libavcodec/arm by Rob Clark and Mans Rullgard. Signed-off-by: Martin Storsjö <martin@martin.st> |
11 years ago |