8 Commits (6f8e365a2af2b6b21701d41eed3b2e3f8a436eeb)

Author SHA1 Message Date
Rémi Denis-Courmont 4f2472909e sws/riscv: add forward-edge CFI landing pads 5 months ago
Rémi Denis-Courmont e91a8cc4de sws/riscv: require B or zba explicitly 5 months ago
Rémi Denis-Courmont 7a3369398f sws/input: R-V V 32-bit RGB to halved UV 7 months ago
Rémi Denis-Courmont e2f069905e sws/input: R-V V 32-bit RGB to UV 7 months ago
Rémi Denis-Courmont f5555cb106 sws/input: R-V V 32-bit RGB to Y 7 months ago
Rémi Denis-Courmont e0f4d185f1 sws/input: R-V V rgb24ToUV_half and bgr24ToUV_half 7 months ago
Rémi Denis-Courmont 3ef5867e4b sws/input: R-V V rgb24ToUV and bgr24ToUV 7 months ago
Rémi Denis-Courmont 79dfdac4db sws/input: R-V V rgb24ToY & bgr24ToY 7 months ago