Chiebot-Mirror/FFmpeg - FFmpeg - Gitea: Git with a cup of tea

Author	SHA1	Message	Date
Mans Rullgard	ec9d2c15c1	ARM: use Q/R inline asm operand modifiers only if supported Some compilers do not support the Q/R modifiers used to access the low/high parts of a 64-bit register pair. Check for this and disable all uses of it when not supported. Fixes bug #337. Signed-off-by: Mans Rullgard <mans@mansr.com>	12 years ago
Mans Rullgard	c02efacc8f	arm: intreadwrite: revert 16-bit load asm to old version for gcc < 4.6 Commit `adebad0` "arm: intreadwrite: fix inline asm constraints for gcc 4.6 and later" caused some older gcc versions to miscompile code. This reverts to the old version of the code for these compilers. Signed-off-by: Mans Rullgard <mans@mansr.com>	13 years ago
Mans Rullgard	ababec7b95	arm: intreadwrite: disable inline asm for gcc 4.7 and later Starting with version 4.7, gcc properly supports unaligned memory accesses on ARM. Not using the inline asm with these compilers results in better code. Signed-off-by: Mans Rullgard <mans@mansr.com>	13 years ago
Mans Rullgard	adebad07e0	arm: intreadwrite: fix inline asm constraints for gcc 4.6 and later With a dereferenced type-cast pointer as memory operand, gcc 4.6 and later will sometimes copy the data to a temporary location, the address of which is used as the operand value, if it thinks the target address might be misaligned. Using a pointer to a packed struct type instead does the right thing. The 16-bit case is special since the ldrh instruction addressing modes are limited compared to ldr. The "Uq" constraint produces a memory reference suitable for an ldrsb instruction, which supports the same addressing modes as ldrh. However, the restrictions appear to apply only when the operand addresses a single byte. The memory reference must thus be split into two operands each targeting one byte. Finally, the "Uq" constraint is only available in ARM mode. The Thumb-2 ldrh instruction supports most addressing modes so the normal "m" constraint can be used there. Signed-off-by: Mans Rullgard <mans@mansr.com>	13 years ago
Mans Rullgard	6bb70dfd74	ARM: simplify inline asm with 64-bit operands Signed-off-by: Mans Rullgard <mans@mansr.com>	14 years ago
Mans Rullgard	2912e87a6c	Replace FFmpeg with Libav in licence headers Signed-off-by: Mans Rullgard <mans@mansr.com>	14 years ago
Måns Rullgård	3288177150	ARM: change return type of AV_RN16() to unsigned This prevents gcc inserting useless UXTH instructions, at least in some cases. Originally committed as revision 25212 to svn://svn.ffmpeg.org/ffmpeg/trunk	14 years ago
Måns Rullgård	bdd19e29df	Mark all intreadwrite functions av_always_inline Originally committed as revision 21278 to svn://svn.ffmpeg.org/ffmpeg/trunk	15 years ago
Måns Rullgård	e6956a6e48	ARM: first value loaded in AV_RN64 needs to be early-clobber Originally committed as revision 19656 to svn://svn.ffmpeg.org/ffmpeg/trunk	15 years ago
Måns Rullgård	3c55ce039d	ARM asm for AV_RN() ARMv6 and later support unaligned loads and stores for single word/halfword but not double/multiple. GCC is ignorant of this and will always use bytewise accesses for unaligned data. Casting to an int32_t pointer is dangerous since a load/store double or multiple instruction might be used (this happens with some code in FFmpeg). Implementing the AV_[RW] macros with inline asm using only supported instructions gives fast and safe unaligned accesses. ARM RVCT does the right thing with generic code. This gives an overall speedup of up to 10%. Originally committed as revision 18601 to svn://svn.ffmpeg.org/ffmpeg/trunk	16 years ago