FFmpeg

Commit Graph

Author	SHA1	Message	Date
Andreas Rheinhardt	4393331250	avcodec/dirac_dwt: Avoid conversions between function pointers and void* Pointers to void can be converted to any pointer to incomplete or object type and back; but they are nevertheless not completely generic pointers: There is no provision in the C standard that guarantees their convertibility with function pointers. C90 lacks a generic function pointer, C99 made every function pointer a generic function pointer and still disallows the convertibility with void *. Both GCC as well as Clang warn about this when using -pedantic. Therefore use unions to avoid these conversions. Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>	2 years ago
Andreas Rheinhardt	a91ddce689	avcodec/dirac_dwt(_template): Don't use ff_-prefix for static func Reviewed-by: Lynne <dev@lynne.ee> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>	2 years ago
James Almer	299253ae1b	avutil/channel_layout: move and improve the comment about unknown orders Don't place it as doxy specific for the order field, and generalize it both to also cover already defined orders and to not make it seem like the user is required to handle a layout they don't fully support or understand. Signed-off-by: James Almer <jamrial@gmail.com>	2 years ago
James Almer	bcd2e7d685	avutil/version: bump minor for the new RISC-V cpu flags Forgotten in `0c0a3deb18`. Signed-off-by: James Almer <jamrial@gmail.com>	2 years ago
Paul B Mahol	4f022e6782	avcodec/mjpegdec: check that index is not negative	2 years ago
Rémi Denis-Courmont	d31013166a	lavc/pixblockdsp: RISC-V diff_pixels & diff_pixels_unaligned	2 years ago
Rémi Denis-Courmont	ebee25855a	lavc/pixblockdsp: RISC-V V 16-bit get_pixels & get_pixels_unaligned	2 years ago
Rémi Denis-Courmont	676b08cb70	lavc/pixblockdsp: RISC-V V 8-bit get_pixels & get_pixels_unaligned	2 years ago
Rémi Denis-Courmont	2746329ce2	lavc/idctdsp: RISC-V V put_signed_pixels_clamped function	2 years ago
Rémi Denis-Courmont	fa983b5656	lavc/idctdsp: RISC-V V add_pixels_clamped function	2 years ago
Rémi Denis-Courmont	b29ee63a1b	lavc/idctdsp: RISC-V V put_pixels_clamped function	2 years ago
Rémi Denis-Courmont	c47ebfa141	lavu/riscv: helper to read the vector length	2 years ago
Martin Storsjö	dd2e524ffa	riscv: Use the correct path for including asm.S Signed-off-by: Martin Storsjö <martin@martin.st>	2 years ago
Pierre-Anthony Lemieux	0e402ebf48	format/imfdec: improve error handling when selecting tracks for playback Reviewed-by: Zane van Iperen <zane@zanevaniperen.com>	2 years ago
Lynne	0bc7ba4488	configure: remove mdct15 from the encoder/decoder's list of requirements	2 years ago
Andreas Rheinhardt	2664b39d54	avocdec/snowenc: Fix left shift of negative number Fixes the vsynth(1\|2\|_lena)-snow-ll FATE-tests. Reviewed-by: Michael Niedermayer <michael@niedermayer.cc> Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>	2 years ago
Timo Rothenpieler	59cb0bd23d	avfilter/vf_extractplanes: add missing break; statement	2 years ago
Derek Buitenhuis	f5cd00bf52	ffprobe: Check for invalid matrix error when printing rotation av_display_rotation_get will return NAN when the display matrix is invalid, which would end up printing NAN as an integer in the rotation field. This is poor for multiple reasons: * Users of ffprobe have no way of discerning "valid but ugly rotation from display matrix" from "invalid display matrix". * It can have unintended consequences on some platforms, such as Linux x86_64, where NAN is equal to INT64_MIN, which, for example, when printed as JSON, which uses floating point for all numbers, can end up as invalid JSON or wit a number that cannot be reserialized as an integer at all. Since NAN is av_display_rotation_get's error case, just print 0 (no rotation) when that happens. Signed-off-by: Derek Buitenhuis <derek.buitenhuis@gmail.com>	2 years ago
Rémi Denis-Courmont	c03f9654c9	lavc/aacpsdsp: RISC-V V stereo_interpolate[0]	2 years ago
Rémi Denis-Courmont	a15edb0bc0	lavc/aacpsdsp: RISC-V V hybrid_synthesis_deint	2 years ago
Rémi Denis-Courmont	09f907999f	lavc/aacpsdsp: RISC-V V hybrid_analysis_ileave	2 years ago
Rémi Denis-Courmont	15c3a0bd6e	lavc/aacpsdsp: RISC-V V hybrid_analysis This starts with one-time initialisation of the 26 constant factors like `08edacc248`. That is done with the scalar instruction set. While the formula can readily be vectored, the gains would (probably) be more than lost in transfering the results back to FP registers (or suitably reshuffling them into vector registers). Note that the main loop could likely be scheduled sligthly better by expanding the filter macro and interleaving loads with arithmetic. It is not clear yet if that would be relevant for vector processing (as opposed to traditional SIMD). We could also use fewer vectors, but there is not much point in sparing them (they are all callee-clobbered).	2 years ago
Rémi Denis-Courmont	e180326a0b	lavc/aacpsdsp: RISC-V V mul_pair_single	2 years ago
Rémi Denis-Courmont	b0cacf4c3f	lavc/aacpsdsp: RISC-V V add_squares	2 years ago
Rémi Denis-Courmont	453aba71e6	lavc/vorbisdsp: RISC-V V inverse_coupling This uses the following vectorisation: for (i = 0; i < blocksize; i++) { ang[i] = mag[i] - copysignf(fmaxf(ang[i], 0.f), mag[i]); mag[i] = mag[i] - copysignf(fminf(ang[i], 0.f), mag[i]); }	2 years ago
Rémi Denis-Courmont	220dfd0945	lavc/fmtconvert: RISC-V V int32_to_float_fmul_array8	2 years ago
Rémi Denis-Courmont	47a10b9a99	lavc/fmtconvert: RISC-V V int32_to_float_fmul_scalar	2 years ago
Rémi Denis-Courmont	f41ae62f39	lavc/audiodsp: RISC-V V scalarproduct_int16	2 years ago
Rémi Denis-Courmont	f127a5d29d	lavc/audiodsp: RISC-V V vector_clipf	2 years ago
Rémi Denis-Courmont	27da9514c3	lavc/audiodsp: RISC-V V vector_clip_int32	2 years ago
Rémi Denis-Courmont	c1bb19e263	lavu/fixeddsp: RISC-V V butterflies_fixed	2 years ago
Rémi Denis-Courmont	cd77662953	lavu/floatdsp: RISC-V V scalarproduct_float	2 years ago
Rémi Denis-Courmont	b493370662	lavu/floatdsp: RISC-V V vector_fmul_window	2 years ago
Rémi Denis-Courmont	9aeb6aca3a	lavu/floatdsp: RISC-V V vector_fmul_reverse	2 years ago
Rémi Denis-Courmont	47ce9735cc	lavu/floatdsp: RISC-V V butterflies_float	2 years ago
Rémi Denis-Courmont	f4ea45040f	lavu/floatdsp: RISC-V V vector_fmul_add	2 years ago
Rémi Denis-Courmont	d120ab5b91	lavu/floatdsp: RISC-V V vector_dmac_scalar	2 years ago
Rémi Denis-Courmont	c3db27ba95	lavu/floatdsp: RISC-V V vector_fmac_scalar	2 years ago
Rémi Denis-Courmont	da169a210d	lavu/floatdsp: RISC-V V vector_dmul	2 years ago
Rémi Denis-Courmont	7058af9969	lavu/floatdsp: RISC-V V vector_fmul	2 years ago
Rémi Denis-Courmont	89b7ec65a8	lavu/floatdsp: RISC-V V vector_dmul_scalar	2 years ago
Rémi Denis-Courmont	a6c10d05fe	lavu/floatdsp: RISC-V V vector_fmul_scalar This is based on existing code from the VLC git tree with two minor changes to account for the different function prototypes.	2 years ago
Rémi Denis-Courmont	39357cad37	lavu/riscv: fallback macros for SH{1, 2, 3}ADD Those mnemonics require the very latest binutils release at the time of writing. These macros provide seamless backward compatibility.	2 years ago
Rémi Denis-Courmont	1b6aee52a5	configure: probe RISC-V Vector extension	2 years ago
Rémi Denis-Courmont	0c0a3deb18	lavu/cpu: CPU flags for the RISC-V Vector extension RVV defines a total of 12 different extensions, including: - 5 different instruction subsets: - Zve32x: 8-, 16- and 32-bit integers, - Zve32f: Zve32x plus single precision floats, - Zve64x: Zve32x plus 64-bit integers, - Zve64f: Zve32f plus Zve64x, - Zve64d: Zve64f plus double precision floats. - 6 different vector lengths: - Zvl32b (embedded only), - Zvl64b (embedded only), - Zvl128b, - Zvl256b, - Zvl512b, - Zvl1024b, - and the V extension proper: equivalent to Zve64f and Zvl128b. In total, there are 6 different possible sets of supported instructions (including the empty set), but for convenience we allocate one bit for each type sets: up-to-32-bit ints (RVV_I32), floats (RVV_F32), 64-bit ints (RVV_I64) and doubles (RVV_F64). Whence the vector size is needed, it can be retrieved by reading the unprivileged read-only vlenb CSR. This should probably be a separate helper macro if needed at a later point.	2 years ago
Rémi Denis-Courmont	1edac8eb46	lavc/pixblockdsp: RISC-V I get_pixels Benchmarks on SiFive U74-MC (courtesy of Shanghai StarFive Tech): get_pixels_c: 180.0 get_pixels_rvi: 136.7	2 years ago
Rémi Denis-Courmont	04d092e7d5	lavc/audiodsp: RISC-V F vector_clipf RV64G supports MIN & MAX instructions natively only on floating point registers, not general purpose ones. The later would require the Zbb extension. Due to that, it is actually faster to perform the clipping "properly" in FPU. Benchmarks on SiFive U74-MC (courtesy of Shanghai StarFive Tech): audiodsp.vector_clipf_c: 29551.5 audiodsp.vector_clipf_rvf: 17871.0 Also tried unrolling with 2 or 8 elements but it gets worse either way.	2 years ago
Rémi Denis-Courmont	746f1ff36a	lavu/riscv: initial common header for assembler macros	2 years ago
Rémi Denis-Courmont	b95e2fbd85	lavu/cpu: detect RISC-V base extensions This introduces compile-time and run-time CPU detection on RISC-V. In practice, I doubt that FFmpeg will ever see a RISC-V CPU without all of I, F and D extensions, and if it does, it probably won't have run-time detection. So the flags are essentially always set. But as things stand, checkasm wants them that way. Compare the ARMV8 flag on AArch64. We are nowhere near running short on CPU flag bits.	2 years ago
Tristan Schmelcher	179830108d	avfilter/scale_eval: Reduce rounding error. When force_original_aspect_ratio and force_divisible_by are both used, dimensions are now rounded to the nearest allowed multiple of force_divisible_by rather than first rounding to the nearest integer and then rounding in a static direction. This results in less distortion of the aspect ratio. Reviewed-by: Thierry Foucu <tfoucu@google.com> Signed-off-by: Tristan Schmelcher <tschmelcher@google.com> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>	2 years ago

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