Some versions of the GNU assembler do not handle 64-bit
immediate operands containing arithmetic. Writing the
value out in full works correctly.
Signed-off-by: Mans Rullgard <mans@mansr.com>
This function is called with only 8-byte alignment from
imdct for size 16. The fft4 function is not called for
the larger FFT or MDCT sizes, so this has no impact on
typical uses.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Current GCC versions know how to generate these instructions
properly and avoiding inline asm gives better code. The MULH
function for ARMv5 uses the same instruction and is also not
needed any more.
The MLS64 macro remains since negating an input would normally
not be allowed as it would fail for INT_MIN. In our uses, the
inputs never have this value and thus negating is safe.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Prior to ARMv6, the destination registers of the SMULL instruction
must be distinct from the first source register. Marking the
output early-clobber ensures it is allocated unique registers.
This restriction is dropped in ARMv6 and later, so allowing overlap
between input and output registers there might give better code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
This enables UAL syntax for all asm files instead of only those
which happen to be incompatible with the old, deprecated syntax.
Signed-off-by: Mans Rullgard <mans@mansr.com>
This function uses old-style vector operations deprecated in VFPv3.
Some implementations, e.g. Cortex-A9, support them only through
slow software emulation. Cortex-A8 does have this functionality
in hardware, but as it also has NEON, this function is not used
there regardless.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Surround memset and ff_vp8_dct_cat_prob by X() in order to fix iOS build
Includes patch by Luca Barbato <lu_zero@gentoo.org>.
Signed-off-by: Luca Barbato <lu_zero@gentoo.org>
This patch lets e.g. dsputil_init chose dsp functions with respect to
the bit depth to decode. The naming scheme of bit depth dependent
functions is <base name>_<bit depth>[_<prefix>] (i.e. the old
clear_blocks_c is now named clear_blocks_8_c).
Note: Some of the functions for high bit depth is not dependent on the
bit depth, but only on the pixel size. This leaves some room for
optimizing binary size.
Preparatory patch for high bit depth h264 decoding support.
Signed-off-by: Ronald S. Bultje <rsbultje@gmail.com>
This patch lets e.g. dsputil_init chose dsp functions with respect to
the bit depth to decode. The naming scheme of bit depth dependent
functions is <base name>_<bit depth>[_<prefix>] (i.e. the old
clear_blocks_c is now named clear_blocks_8_c).
Note: Some of the functions for high bit depth is not dependent on the
bit depth, but only on the pixel size. This leaves some room for
optimizing binary size.
Preparatory patch for high bit depth h264 decoding support.
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
AS libavcodec/arm/ac3dsp_armv6.o
ffmpeg-src/libavcodec/arm/ac3dsp_armv6.S: Assembler messages:
ffmpeg-src/libavcodec/arm/ac3dsp_armv6.S:40: Error: selected processor
does not support `movw r8,#0x1fe0'
make[1]: *** [libavcodec/arm/ac3dsp_armv6.o] Error 1
MOVW is ARMv7 way to load constant:
* movw, or move wide, will move a 16-bit constant into a register,
implicitly zeroing the top 16 bits of the target register.
* movt, or move top, will move a 16-bit constant into the top half
of a given register without altering the bottom 16 bits
To load 32 bit constant, movw lower16; movt upper16; is better than
ldr if available, because:
While this approach takes two instructions, it does not require any
extra space to store the constant so both the movw/movt method and the
ldr method will end up using the same amount of memory. Memory
bandwidth is precious in and the movw/movt approach avoids an extra
read on the data side, not to mention the read could have missed the
cache.
But here it is armv6 optimization, so that we have to use ldr.
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>