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${ noResults }
11 Commits (19321a295a641cbc067ec0df597bc1b69addf049)
| Author | SHA1 | Message | Date |
|---|---|---|---|
James Cowgill
|
eae13eae9d |
configure, mips: remove MIPS32R2, merging it with MIPSFPU
There are no independant uses of mips32r2 instructions except for the FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway. Since these fpu instructions are available on mips64 (non-r2), enable them there as well. Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to HAVE_MIPSFPU anyway). mips32r2 is left in the list of options form compatability so that using --disable-mips32r2 doesn't break anything. Signed-off-by: James Cowgill <james410@cowgill.org.uk> Signed-off-by: Michael Niedermayer <michaelni@gmx.at> |
10 years ago |
Janne Grunau
|
8675bcb0ad |
aarch64: add armv8 CPU flag
|
11 years ago |
Diego Biurrun
|
b4dd424d96 |
Remove all SPARC architecture optimizations
SPARC is no longer being used in any multimedia-related fields and the VIS optimizations only represent a maintenance burden. |
11 years ago |
Mans Rullgard
|
b326755989 |
arm: rename ARMVFP config symbol to VFP
This is consistent with usual ARM nomenclature as well as with the VFPV3 and NEON symbols which both lack the ARM prefix. Signed-off-by: Mans Rullgard <mans@mansr.com> |
12 years ago |
|
Diego Biurrun
|
ca411fc1d3 |
avcodec: Remove broken MMI optimizations
The code fails to compile and is broken beyond repair. |
12 years ago |
Nedeljko Babic
|
3827a86eac |
Optimization of AMR NB and WB decoders for MIPS
AMR NB and WB decoders are optimized for MIPS architecture. Appropriate Makefiles are changed accordingly. Cnfigure script is changed in order to support optimizations. Optimizations are enabled by default when compiling is done for mips architecture. Appropriate cflags are automatically set. Support for several mips CPUs is added in configure script. New ffmpeg options are added for disabling optimizations. The FFMPEG option --disable-mipsfpu disables MIPS floating point optimizations. The FFMPEG option --disable-mips32r2 disables MIPS32R2 optimizations. The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1 optimizations. The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2 optimizations. Signed-off-by: Nedeljko Babic <nbabic@mips.com> Reviewed-by: Vitor Sessak <vitor1001@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at> |
13 years ago |
|
Diego Biurrun
|
7bb3a302fe |
build: Consistently handle conditional compilation for all optimization OBJS.
|
13 years ago |