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${ noResults }
5 Commits (0aaabe1fd72fb4d302a433ce33e45fb8c2301d6f)
| Author | SHA1 | Message | Date |
|---|---|---|---|
Jin Bo
|
ebedd26eef |
libavcodec/mips: Fix specification of instruction name
1.'xor,or,and' to 'pxor,por,pand'. In the case of operating FPR, gcc supports both of them, clang only supports the second type. 2.'dsrl,srl' to 'ssrld,ssrlw'. In the case of operating FPR, gcc supports both of them, clang only supports the second type. Signed-off-by: Jin Bo <jinbo@loongson.cn> Reviewed-by: yinshiyou-hf@loongson.cn Signed-off-by: Michael Niedermayer <michael@niedermayer.cc> |
4 years ago |
Zhou Xiaoyong
|
89ec4adad6 |
avcodec/mips: loongson optimize mmi load and store operators
1.MMI_ load/store macros are defined in libavutil/mips/mmiutils.h 2.Replace some unnecessary unaligned access with aligned operator 3.The MMI_ load/store is compatible with cpu loongson2e/2f which not support instructions start with gs Signed-off-by: Michael Niedermayer <michael@niedermayer.cc> |
8 years ago |
|
ZhouXiaoyong
|
05a546181f |
avcodec/mips/blockdsp_mmi: Version 2 of the optimizations for loongson mmi
1. no longer use the register names directly and optimized code format
2. to be compatible with O32, specify type of address variable with mips_reg and handle the address variable with PTR_ operator
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
|
9 years ago |
|
周晓勇
|
c303ad85a9 |
avcodec: loongson optimize blockdsp with mmi
Signed-off-by: ZhouXiaoyong <zhouxiaoyong@loongson.cn> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc> |
10 years ago |