altivec: perform an explicit unaligned load

Implicit vector loads on POWER7 hardware can use the VSX
instruction set instead of classic Altivec/VMX. Let's force
a VMX load in this case.

Signed-off-by: Martin Storsjö <martin@martin.st>

libavcodec/ppc/int_altivec.c

@@ -84,14 +84,12 @@ static int32_t scalarproduct_int16_altivec(const int16_t *v1, const int16_t *v2,
 {
     int i;
     LOAD_ZERO;
-    const vec_s16 *pv;
     register vec_s16 vec1;
     register vec_s32 res = vec_splat_s32(0), t;
     int32_t ires;
 
     for(i = 0; i < order; i += 8){
-        pv = (const vec_s16*)v1;
-        vec1 = vec_perm(pv[0], pv[1], vec_lvsl(0, v1));
+        vec1 = vec_unaligned_load(v1);
         t = vec_msum(vec1, vec_ld(0, v2), zero_s32v);
         res = vec_sums(t, res);
         v1 += 8;