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@ -26,70 +26,70 @@ |
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* T-REC-H.265-201802 |
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*/ |
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enum HEVCNALUnitType { |
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HEVC_NAL_TRAIL_N = 0, |
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HEVC_NAL_TRAIL_R = 1, |
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HEVC_NAL_TSA_N = 2, |
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HEVC_NAL_TSA_R = 3, |
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HEVC_NAL_STSA_N = 4, |
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HEVC_NAL_STSA_R = 5, |
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HEVC_NAL_RADL_N = 6, |
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HEVC_NAL_RADL_R = 7, |
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HEVC_NAL_RASL_N = 8, |
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HEVC_NAL_RASL_R = 9, |
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HEVC_NAL_VCL_N10 = 10, |
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HEVC_NAL_VCL_R11 = 11, |
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HEVC_NAL_VCL_N12 = 12, |
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HEVC_NAL_VCL_R13 = 13, |
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HEVC_NAL_VCL_N14 = 14, |
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HEVC_NAL_VCL_R15 = 15, |
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HEVC_NAL_BLA_W_LP = 16, |
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HEVC_NAL_BLA_W_RADL = 17, |
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HEVC_NAL_BLA_N_LP = 18, |
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HEVC_NAL_IDR_W_RADL = 19, |
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HEVC_NAL_IDR_N_LP = 20, |
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HEVC_NAL_CRA_NUT = 21, |
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HEVC_NAL_TRAIL_N = 0, |
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HEVC_NAL_TRAIL_R = 1, |
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HEVC_NAL_TSA_N = 2, |
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HEVC_NAL_TSA_R = 3, |
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HEVC_NAL_STSA_N = 4, |
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HEVC_NAL_STSA_R = 5, |
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HEVC_NAL_RADL_N = 6, |
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HEVC_NAL_RADL_R = 7, |
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HEVC_NAL_RASL_N = 8, |
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HEVC_NAL_RASL_R = 9, |
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HEVC_NAL_VCL_N10 = 10, |
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HEVC_NAL_VCL_R11 = 11, |
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HEVC_NAL_VCL_N12 = 12, |
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HEVC_NAL_VCL_R13 = 13, |
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HEVC_NAL_VCL_N14 = 14, |
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HEVC_NAL_VCL_R15 = 15, |
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HEVC_NAL_BLA_W_LP = 16, |
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HEVC_NAL_BLA_W_RADL = 17, |
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HEVC_NAL_BLA_N_LP = 18, |
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HEVC_NAL_IDR_W_RADL = 19, |
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HEVC_NAL_IDR_N_LP = 20, |
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HEVC_NAL_CRA_NUT = 21, |
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HEVC_NAL_RSV_IRAP_VCL22 = 22, |
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HEVC_NAL_RSV_IRAP_VCL23 = 23, |
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HEVC_NAL_RSV_VCL24 = 24, |
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HEVC_NAL_RSV_VCL25 = 25, |
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HEVC_NAL_RSV_VCL26 = 26, |
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HEVC_NAL_RSV_VCL27 = 27, |
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HEVC_NAL_RSV_VCL28 = 28, |
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HEVC_NAL_RSV_VCL29 = 29, |
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HEVC_NAL_RSV_VCL30 = 30, |
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HEVC_NAL_RSV_VCL31 = 31, |
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HEVC_NAL_VPS = 32, |
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HEVC_NAL_SPS = 33, |
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HEVC_NAL_PPS = 34, |
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HEVC_NAL_AUD = 35, |
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HEVC_NAL_EOS_NUT = 36, |
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HEVC_NAL_EOB_NUT = 37, |
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HEVC_NAL_FD_NUT = 38, |
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HEVC_NAL_SEI_PREFIX = 39, |
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HEVC_NAL_SEI_SUFFIX = 40, |
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HEVC_NAL_RSV_NVCL41 = 41, |
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HEVC_NAL_RSV_NVCL42 = 42, |
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HEVC_NAL_RSV_NVCL43 = 43, |
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HEVC_NAL_RSV_NVCL44 = 44, |
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HEVC_NAL_RSV_NVCL45 = 45, |
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HEVC_NAL_RSV_NVCL46 = 46, |
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HEVC_NAL_RSV_NVCL47 = 47, |
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HEVC_NAL_UNSPEC48 = 48, |
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HEVC_NAL_UNSPEC49 = 49, |
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HEVC_NAL_UNSPEC50 = 50, |
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HEVC_NAL_UNSPEC51 = 51, |
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HEVC_NAL_UNSPEC52 = 52, |
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HEVC_NAL_UNSPEC53 = 53, |
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HEVC_NAL_UNSPEC54 = 54, |
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HEVC_NAL_UNSPEC55 = 55, |
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HEVC_NAL_UNSPEC56 = 56, |
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HEVC_NAL_UNSPEC57 = 57, |
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HEVC_NAL_UNSPEC58 = 58, |
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HEVC_NAL_UNSPEC59 = 59, |
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HEVC_NAL_UNSPEC60 = 60, |
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HEVC_NAL_UNSPEC61 = 61, |
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HEVC_NAL_UNSPEC62 = 62, |
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HEVC_NAL_UNSPEC63 = 63, |
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HEVC_NAL_RSV_VCL24 = 24, |
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HEVC_NAL_RSV_VCL25 = 25, |
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HEVC_NAL_RSV_VCL26 = 26, |
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HEVC_NAL_RSV_VCL27 = 27, |
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HEVC_NAL_RSV_VCL28 = 28, |
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HEVC_NAL_RSV_VCL29 = 29, |
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HEVC_NAL_RSV_VCL30 = 30, |
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HEVC_NAL_RSV_VCL31 = 31, |
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HEVC_NAL_VPS = 32, |
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HEVC_NAL_SPS = 33, |
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HEVC_NAL_PPS = 34, |
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HEVC_NAL_AUD = 35, |
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HEVC_NAL_EOS_NUT = 36, |
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HEVC_NAL_EOB_NUT = 37, |
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HEVC_NAL_FD_NUT = 38, |
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HEVC_NAL_SEI_PREFIX = 39, |
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HEVC_NAL_SEI_SUFFIX = 40, |
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HEVC_NAL_RSV_NVCL41 = 41, |
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HEVC_NAL_RSV_NVCL42 = 42, |
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HEVC_NAL_RSV_NVCL43 = 43, |
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HEVC_NAL_RSV_NVCL44 = 44, |
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HEVC_NAL_RSV_NVCL45 = 45, |
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HEVC_NAL_RSV_NVCL46 = 46, |
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HEVC_NAL_RSV_NVCL47 = 47, |
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HEVC_NAL_UNSPEC48 = 48, |
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HEVC_NAL_UNSPEC49 = 49, |
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HEVC_NAL_UNSPEC50 = 50, |
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HEVC_NAL_UNSPEC51 = 51, |
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HEVC_NAL_UNSPEC52 = 52, |
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HEVC_NAL_UNSPEC53 = 53, |
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HEVC_NAL_UNSPEC54 = 54, |
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HEVC_NAL_UNSPEC55 = 55, |
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HEVC_NAL_UNSPEC56 = 56, |
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HEVC_NAL_UNSPEC57 = 57, |
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HEVC_NAL_UNSPEC58 = 58, |
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HEVC_NAL_UNSPEC59 = 59, |
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HEVC_NAL_UNSPEC60 = 60, |
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HEVC_NAL_UNSPEC61 = 61, |
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HEVC_NAL_UNSPEC62 = 62, |
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HEVC_NAL_UNSPEC63 = 63, |
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}; |
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enum HEVCSliceType { |
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