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@ -45,6 +45,9 @@ void ff_four_imdct36_float_sse(float *out, float *buf, float *in, float *win, |
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void ff_four_imdct36_float_avx(float *out, float *buf, float *in, float *win, |
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float *tmpbuf); |
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void ff_dct32_float_sse2(float *out, const float *in); |
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void ff_dct32_float_avx (float *out, const float *in); |
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DECLARE_ALIGNED(16, static float, mdct_win_sse)[2][4][4*40]; |
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#if HAVE_6REGS && HAVE_SSE_INLINE |
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@ -267,6 +270,7 @@ av_cold void ff_mpadsp_init_x86(MPADSPContext *s) |
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#if HAVE_SSE |
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if (EXTERNAL_SSE2(cpu_flags)) { |
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s->imdct36_blocks_float = imdct36_blocks_sse2; |
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s->dct32_float = ff_dct32_float_sse2; |
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} |
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if (EXTERNAL_SSE3(cpu_flags)) { |
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s->imdct36_blocks_float = imdct36_blocks_sse3; |
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@ -279,6 +283,8 @@ av_cold void ff_mpadsp_init_x86(MPADSPContext *s) |
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if (EXTERNAL_AVX(cpu_flags)) { |
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s->imdct36_blocks_float = imdct36_blocks_avx; |
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} |
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if (EXTERNAL_AVX_FAST(cpu_flags)) |
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s->dct32_float = ff_dct32_float_avx; |
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#endif |
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#endif /* HAVE_X86ASM */ |
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} |
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