configure: Remove dcbzl check for e500v1 and e500v2 architectures

The DCBZL instruction is not available for the e500v1 and e500v2
architectures, but may still be recognized by the toolchain, so we need to
remove the test for it explicitly for these architectures.

References: PowerPC™ e500 Core Family Reference Manual (Freescale)

Found-by: Ståle Kristoffersen <staalebk@ifi.uio.no>

Signed-off-by: Michael Niedermayer <michaelni@gmx.at>

configure

@@ -4147,7 +4147,8 @@ elif enabled ppc; then
 
     enable local_aligned_8 local_aligned_16
 
-    check_inline_asm dcbzl     '"dcbzl 0, %0" :: "r"(0)'
+    [ $cpu != e500 -a $cpu != e500v2 ] &&
+     check_inline_asm dcbzl    '"dcbzl 0, %0" :: "r"(0)'
     check_inline_asm ibm_asm   '"add 0, 0, 0"'
     check_inline_asm ppc4xx    '"maclhw r10, r11, r12"'
     check_inline_asm xform_asm '"lwzx %1, %y0" :: "Z"(*(int*)0), "r"(0)'