mathops: mips: Correctly enable loongson-specific assembly

The code wrongly assumed that the instructions used are supported
on mips64, while it is supported only on loongson cpus.

libavcodec/mips/mathops.h

@@ -28,13 +28,16 @@
 #if HAVE_INLINE_ASM
 
 #if HAVE_LOONGSON
+#if ARCH_MIPS64
 
 static inline av_const int64_t MAC64(int64_t d, int a, int b)
 {
     int64_t m;
-    __asm__ ("dmult.g %1, %2, %3 \n\t"
-             "daddu   %0, %0, %1 \n\t"
-             : "+r"(d), "=&r"(m) : "r"(a), "r"(b));
+    __asm__ ("dmult %2, %3     \n\t"
+             "mflo  %1         \n\t"
+             "daddu %0, %0, %1 \n\t"
+             : "+r"(d), "=&r"(m) : "r"(a), "r"(b)
+             : "hi", "lo");
     return d;
 }
 #define MAC64(d, a, b) ((d) = MAC64(d, a, b))
@@ -42,23 +45,23 @@ static inline av_const int64_t MAC64(int64_t d, int a, int b)
 static inline av_const int64_t MLS64(int64_t d, int a, int b)
 {
     int64_t m;
-    __asm__ ("dmult.g %1, %2, %3 \n\t"
-             "dsubu   %0, %0, %1 \n\t"
-             : "+r"(d), "=&r"(m) : "r"(a), "r"(b));
+    __asm__ ("dmult %2, %3     \n\t"
+             "mflo  %1         \n\t"
+             "dsubu %0, %0, %1 \n\t"
+             : "+r"(d), "=&r"(m) : "r"(a), "r"(b)
+             : "hi", "lo");
     return d;
 }
 #define MLS64(d, a, b) ((d) = MLS64(d, a, b))
 
-#elif ARCH_MIPS64
+#else
 
 static inline av_const int64_t MAC64(int64_t d, int a, int b)
 {
     int64_t m;
-    __asm__ ("dmult %2, %3     \n\t"
-             "mflo  %1         \n\t"
-             "daddu %0, %0, %1 \n\t"
-             : "+r"(d), "=&r"(m) : "r"(a), "r"(b)
-             : "hi", "lo");
+    __asm__ ("dmult.g %1, %2, %3 \n\t"
+             "daddu   %0, %0, %1 \n\t"
+             : "+r"(d), "=&r"(m) : "r"(a), "r"(b));
     return d;
 }
 #define MAC64(d, a, b) ((d) = MAC64(d, a, b))
@@ -66,17 +69,17 @@ static inline av_const int64_t MAC64(int64_t d, int a, int b)
 static inline av_const int64_t MLS64(int64_t d, int a, int b)
 {
     int64_t m;
-    __asm__ ("dmult %2, %3     \n\t"
-             "mflo  %1         \n\t"
-             "dsubu %0, %0, %1 \n\t"
-             : "+r"(d), "=&r"(m) : "r"(a), "r"(b)
-             : "hi", "lo");
+    __asm__ ("dmult.g %1, %2, %3 \n\t"
+             "dsubu   %0, %0, %1 \n\t"
+             : "+r"(d), "=&r"(m) : "r"(a), "r"(b));
     return d;
 }
 #define MLS64(d, a, b) ((d) = MLS64(d, a, b))
 
 #endif
 
+#endif /* HAVE_LOONGSON */
+
 #endif /* HAVE_INLINE_ASM */
 
 #endif /* AVCODEC_MIPS_MATHOPS_H */