Merge commit '5bcbb516f2ff45290ef7995b081762e668693672'

* commit '5bcbb516f2ff45290ef7995b081762e668693672':
  arm: Add X() around all references to extern symbols

Merged-by: Michael Niedermayer <michaelni@gmx.at>
pull/43/merge
Michael Niedermayer 11 years ago
commit bf90abe1dd
  1. 2
      libavcodec/arm/fmtconvert_neon.S
  2. 16
      libavcodec/arm/h264idct_neon.S
  3. 4
      libavcodec/arm/hpeldsp_armv6.S
  4. 2
      libavcodec/arm/mdct_neon.S
  5. 2
      libavcodec/arm/mpegvideo_neon.S
  6. 2
      libavcodec/arm/videodsp_armv5te.S
  7. 16
      libavcodec/arm/vp8dsp_armv6.S
  8. 4
      libavresample/arm/audio_convert_neon.S

@ -70,7 +70,7 @@ function ff_float_to_int16_interleave_neon, export=1
cmp r3, #2
itt lt
ldrlt r1, [r1]
blt ff_float_to_int16_neon
blt X(ff_float_to_int16_neon)
bne 4f
ldr r3, [r1]

@ -113,8 +113,8 @@ function ff_h264_idct_add16_neon, export=1
movne lr, #0
cmp lr, #0
ite ne
adrne lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB
adreq lr, ff_h264_idct_add_neon + CONFIG_THUMB
adrne lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB
adreq lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB
blx lr
2: subs ip, ip, #1
add r1, r1, #32
@ -138,8 +138,8 @@ function ff_h264_idct_add16intra_neon, export=1
cmp r8, #0
ldrsh r8, [r1]
iteet ne
adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB
adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB
adrne lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB
adreq lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB
cmpeq r8, #0
blxne lr
subs ip, ip, #1
@ -166,8 +166,8 @@ function ff_h264_idct_add8_neon, export=1
cmp r8, #0
ldrsh r8, [r1]
iteet ne
adrne lr, ff_h264_idct_add_neon + CONFIG_THUMB
adreq lr, ff_h264_idct_dc_add_neon + CONFIG_THUMB
adrne lr, X(ff_h264_idct_add_neon) + CONFIG_THUMB
adreq lr, X(ff_h264_idct_dc_add_neon) + CONFIG_THUMB
cmpeq r8, #0
blxne lr
add r12, r12, #1
@ -388,8 +388,8 @@ function ff_h264_idct8_add4_neon, export=1
movne lr, #0
cmp lr, #0
ite ne
adrne lr, ff_h264_idct8_dc_add_neon + CONFIG_THUMB
adreq lr, ff_h264_idct8_add_neon + CONFIG_THUMB
adrne lr, X(ff_h264_idct8_dc_add_neon) + CONFIG_THUMB
adreq lr, X(ff_h264_idct8_add_neon) + CONFIG_THUMB
blx lr
2: subs r12, r12, #4
add r1, r1, #128

@ -23,11 +23,11 @@
.macro call_2x_pixels type, subp
function ff_\type\()_pixels16\subp\()_armv6, export=1
push {r0-r3, lr}
bl ff_\type\()_pixels8\subp\()_armv6
bl X(ff_\type\()_pixels8\subp\()_armv6)
pop {r0-r3, lr}
add r0, r0, #8
add r1, r1, #8
b ff_\type\()_pixels8\subp\()_armv6
b X(ff_\type\()_pixels8\subp\()_armv6)
endfunc
.endm

@ -129,7 +129,7 @@ function ff_imdct_calc_neon, export=1
lsl r4, r4, r3
add r1, r1, r4
bl ff_imdct_half_neon
bl X(ff_imdct_half_neon)
add r0, r5, r4, lsl #2
add r1, r5, r4, lsl #1

@ -100,7 +100,7 @@ function ff_dct_unquantize_h263_intra_neon, export=1
smulbb r4, r4, r6
2: lsl r0, r3, #1
add r3, r12, #1
bl ff_dct_unquantize_h263_neon
bl X(ff_dct_unquantize_h263_neon)
vmov.16 d0[0], r4
vst1.16 {d0[0]}, [r5]
pop {r4-r6,pc}

@ -26,6 +26,6 @@ function ff_prefetch_arm, export=1
subs r2, r2, #1
pld [r0]
add r0, r0, r1
bne ff_prefetch_arm
bne X(ff_prefetch_arm)
bx lr
endfunc

@ -359,14 +359,14 @@ endfunc
function ff_vp8_idct_dc_add4uv_armv6, export=1
push {r4, lr}
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, r2, lsl #2
sub r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
pop {r4, pc}
endfunc
@ -375,13 +375,13 @@ endfunc
function ff_vp8_idct_dc_add4y_armv6, export=1
push {r4, lr}
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
add r0, r0, #4
bl ff_vp8_idct_dc_add_armv6
bl X(ff_vp8_idct_dc_add_armv6)
pop {r4, pc}
endfunc

@ -133,8 +133,8 @@ function ff_conv_fltp_to_s16_neon, export=1
cmp r3, #2
itt lt
ldrlt r1, [r1]
blt ff_conv_flt_to_s16_neon
beq ff_conv_fltp_to_s16_2ch_neon
blt X(ff_conv_flt_to_s16_neon)
beq X(ff_conv_fltp_to_s16_2ch_neon)
push {r4-r8, lr}
cmp r3, #4

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