From b582af1ed7781f181bd656f9f2d8e7a603ba1178 Mon Sep 17 00:00:00 2001
From: "Ronald S. Bultje" <rbultje@chromium.org>
Date: Tue, 29 Jan 2013 15:55:19 -0800
Subject: [PATCH] Use simple nop codes for <= sse (rather than <= mmx).

The "CPU: CentaurHauls family 6 model 9 stepping 8" family of CPUs
(flags: fpu vme de pse tsc msr cx8 sep mtrr pge mov pat mmx fxsr sse
up rng rng_en ace ace_en) SIGILLs on long nop codes.

Change-Id: I7e7c52a2191006df30a9aadbc40d481a1db89106
---
 libavutil/x86/x86inc.asm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
index 56c85afadf..068e3cf5c8 100644
--- a/libavutil/x86/x86inc.asm
+++ b/libavutil/x86/x86inc.asm
@@ -771,7 +771,7 @@ SECTION .note.GNU-stack noalloc noexec nowrite progbits
         %elifidn %1, sse3
             %define movu lddqu
         %endif
-        %if notcpuflag(mmx2)
+        %if notcpuflag(sse2)
             CPUNOP basicnop
         %endif
     %else