Merge commit 'a5a0ef5e13a59ff53318a45d77c5624b23229c6f'

* commit 'a5a0ef5e13a59ff53318a45d77c5624b23229c6f':
  jpegls: return meaningful errors
  sparc: VIS mnemonics

Merged-by: Michael Niedermayer <michaelni@gmx.at>

libavcodec/jpeglsdec.c

@@ -68,13 +68,13 @@ int ff_jpegls_decode_lse(MJpegDecodeContext *s)
     case 2:
     case 3:
         av_log(s->avctx, AV_LOG_ERROR, "palette not supported\n");
-        return -1;
+        return AVERROR(ENOSYS);
     case 4:
         av_log(s->avctx, AV_LOG_ERROR, "oversize image not supported\n");
-        return -1;
+        return AVERROR(ENOSYS);
     default:
         av_log(s->avctx, AV_LOG_ERROR, "invalid id %d\n", id);
-        return -1;
+        return AVERROR_INVALIDDATA;
     }
     av_dlog(s->avctx, "ID=%i, T=%i,%i,%i\n", id, s->t1, s->t2, s->t3);
 
@@ -352,11 +352,10 @@ int ff_jpegls_decode_picture(MJpegDecodeContext *s, int near,
             cur += s->picture.linesize[0];
         }
     } else if (ilv == 2) { /* sample interleaving */
-        av_log(s->avctx, AV_LOG_ERROR,
-               "Sample interleaved images are not supported.\n");
+        avpriv_report_missing_feature(s->avctx, "Sample interleaved images");
         av_free(state);
         av_free(zero);
-        return -1;
+        return AVERROR_PATCHWELCOME;
     }
 
     if (shift) { /* we need to do point transform or normalize samples */

libavcodec/sparc/vis.h

@@ -150,12 +150,9 @@ static inline int vis_level(void)
 #define vis_m2r_2(op,mem1,mem2,rd) \
         __asm__ volatile (#op "\t[%0 + %1], %%f" #rd : : "r" (mem1), "r" (mem2) )
 
-static inline void vis_set_gsr(unsigned int _val)
+static inline void vis_set_gsr(unsigned int val)
 {
-        register unsigned int val __asm__("g1");
-
-        val = _val;
-        __asm__ volatile(".word 0xa7804000"
+        __asm__ volatile("mov %0,%%asr19"
                              : : "r" (val));
 }
 
@@ -208,36 +205,19 @@ static inline void vis_set_gsr(unsigned int _val)
 
 /* Alignment instructions.  */
 
-static inline const void *vis_alignaddr(const void *_ptr)
+static inline const void *vis_alignaddr(const void *ptr)
 {
-        register const void *ptr __asm__("g1");
-
-        ptr = _ptr;
-
-        __asm__ volatile(".word %2"
+        __asm__ volatile("alignaddr %0, %%g0, %0"
                              : "=&r" (ptr)
-                             : "0" (ptr),
-                               "i" (vis_opc_base | vis_opf(0x18) |
-                                    vis_rs1_s(1) |
-                                    vis_rs2_s(0) |
-                                    vis_rd_s(1)));
+                             : "0" (ptr));
 
         return ptr;
 }
 
-static inline void vis_alignaddr_g0(void *_ptr)
+static inline void vis_alignaddr_g0(void *ptr)
 {
-        register void *ptr __asm__("g1");
-
-        ptr = _ptr;
-
-        __asm__ volatile(".word %2"
-                             : "=&r" (ptr)
-                             : "0" (ptr),
-                               "i" (vis_opc_base | vis_opf(0x18) |
-                                    vis_rs1_s(1) |
-                                    vis_rs2_s(0) |
-                                    vis_rd_s(0)));
+        __asm__ volatile("alignaddr %0, %%g0, %%g0"
+                             : : "r" (ptr));
 }
 
 #define vis_faligndata(rs1,rs2,rd)        vis_dd2d(0x48, rs1, rs2, rd)