mirror of https://github.com/FFmpeg/FFmpeg.git
Signed-off-by: Bojan Zivkovic <bojan@mips.com> Reveiwed-by: Vitor Sessak <vitor1001@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>pull/8/head
Bojan Zivkovic
12 years ago
committed by
Michael Niedermayer
parent
c02ae48271
commit
a74ae4691a
9 changed files with 490 additions and 0 deletions
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/*
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* Copyright (c) 2012 |
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* MIPS Technologies, Inc., California. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions |
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* are met: |
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* 1. Redistributions of source code must retain the above copyright |
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* notice, this list of conditions and the following disclaimer. |
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* 2. Redistributions in binary form must reproduce the above copyright |
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* notice, this list of conditions and the following disclaimer in the |
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* documentation and/or other materials provided with the distribution. |
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* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its |
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* contributors may be used to endorse or promote products derived from |
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* this software without specific prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND |
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE |
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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* SUCH DAMAGE. |
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* |
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* Author: Branimir Vasic (bvasic@mips.com) |
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* |
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* Various AC-3 DSP Utils optimized for MIPS |
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* |
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* This file is part of FFmpeg. |
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* |
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* FFmpeg is free software; you can redistribute it and/or |
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* modify it under the terms of the GNU Lesser General Public |
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* License as published by the Free Software Foundation; either |
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* version 2.1 of the License, or (at your option) any later version. |
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* |
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* FFmpeg is distributed in the hope that it will be useful, |
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* but WITHOUT ANY WARRANTY; without even the implied warranty of |
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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* Lesser General Public License for more details. |
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* |
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* You should have received a copy of the GNU Lesser General Public |
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* License along with FFmpeg; if not, write to the Free Software |
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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*/ |
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/**
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* @file |
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* Reference: libavcodec/ac3dsp.c |
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*/ |
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#include "config.h" |
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#include "libavcodec/ac3dsp.h" |
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#include "libavcodec/ac3.h" |
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#if HAVE_INLINE_ASM |
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#if HAVE_MIPSDSPR1 |
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static void ac3_bit_alloc_calc_bap_mips(int16_t *mask, int16_t *psd, |
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int start, int end, |
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int snr_offset, int floor, |
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const uint8_t *bap_tab, uint8_t *bap) |
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{ |
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int band, band_end, cond; |
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int m, address1, address2; |
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int16_t *psd1, *psd_end; |
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uint8_t *bap1; |
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if (snr_offset == -960) { |
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memset(bap, 0, AC3_MAX_COEFS); |
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return; |
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} |
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psd1 = &psd[start]; |
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bap1 = &bap[start]; |
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band = ff_ac3_bin_to_band_tab[start]; |
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do { |
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m = (FFMAX(mask[band] - snr_offset - floor, 0) & 0x1FE0) + floor; |
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band_end = ff_ac3_band_start_tab[++band]; |
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band_end = FFMIN(band_end, end); |
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psd_end = psd + band_end - 1; |
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__asm__ volatile ( |
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"slt %[cond], %[psd1], %[psd_end] \n\t" |
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"beqz %[cond], 1f \n\t" |
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"2: \n\t" |
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"lh %[address1], 0(%[psd1]) \n\t" |
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"lh %[address2], 2(%[psd1]) \n\t" |
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"addiu %[psd1], %[psd1], 4 \n\t" |
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"subu %[address1], %[address1], %[m] \n\t" |
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"sra %[address1], %[address1], 5 \n\t" |
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"addiu %[address1], %[address1], -32 \n\t" |
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"shll_s.w %[address1], %[address1], 26 \n\t" |
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"subu %[address2], %[address2], %[m] \n\t" |
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"sra %[address2], %[address2], 5 \n\t" |
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"sra %[address1], %[address1], 26 \n\t" |
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"addiu %[address1], %[address1], 32 \n\t" |
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"lbux %[address1], %[address1](%[bap_tab]) \n\t" |
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"addiu %[address2], %[address2], -32 \n\t" |
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"shll_s.w %[address2], %[address2], 26 \n\t" |
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"sb %[address1], 0(%[bap1]) \n\t" |
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"slt %[cond], %[psd1], %[psd_end] \n\t" |
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"sra %[address2], %[address2], 26 \n\t" |
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"addiu %[address2], %[address2], 32 \n\t" |
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"lbux %[address2], %[address2](%[bap_tab]) \n\t" |
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"sb %[address2], 1(%[bap1]) \n\t" |
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"addiu %[bap1], %[bap1], 2 \n\t" |
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"bnez %[cond], 2b \n\t" |
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"addiu %[psd_end], %[psd_end], 2 \n\t" |
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"slt %[cond], %[psd1], %[psd_end] \n\t" |
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"beqz %[cond], 3f \n\t" |
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"1: \n\t" |
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"lh %[address1], 0(%[psd1]) \n\t" |
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"addiu %[psd1], %[psd1], 2 \n\t" |
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"subu %[address1], %[address1], %[m] \n\t" |
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"sra %[address1], %[address1], 5 \n\t" |
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"addiu %[address1], %[address1], -32 \n\t" |
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"shll_s.w %[address1], %[address1], 26 \n\t" |
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"sra %[address1], %[address1], 26 \n\t" |
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"addiu %[address1], %[address1], 32 \n\t" |
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"lbux %[address1], %[address1](%[bap_tab]) \n\t" |
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"sb %[address1], 0(%[bap1]) \n\t" |
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"addiu %[bap1], %[bap1], 1 \n\t" |
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"3: \n\t" |
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: [address1]"=&r"(address1), [address2]"=&r"(address2), |
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[cond]"=&r"(cond), [bap1]"+r"(bap1), |
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[psd1]"+r"(psd1), [psd_end]"+r"(psd_end) |
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: [m]"r"(m), [bap_tab]"r"(bap_tab) |
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: "memory" |
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); |
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} while (end > band_end); |
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} |
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static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16], uint8_t *bap, |
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int len) |
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{ |
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int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; |
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__asm__ volatile ( |
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"andi %[temp3], %[len], 3 \n\t" |
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"addu %[temp2], %[bap], %[len] \n\t" |
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"addu %[temp4], %[bap], %[temp3] \n\t" |
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"beq %[temp2], %[temp4], 4f \n\t" |
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"1: \n\t" |
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"lbu %[temp0], -1(%[temp2]) \n\t" |
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"lbu %[temp5], -2(%[temp2]) \n\t" |
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"lbu %[temp6], -3(%[temp2]) \n\t" |
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"sll %[temp0], %[temp0], 1 \n\t" |
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"addu %[temp0], %[mant_cnt], %[temp0] \n\t" |
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"sll %[temp5], %[temp5], 1 \n\t" |
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"addu %[temp5], %[mant_cnt], %[temp5] \n\t" |
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"lhu %[temp1], 0(%[temp0]) \n\t" |
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"sll %[temp6], %[temp6], 1 \n\t" |
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"addu %[temp6], %[mant_cnt], %[temp6] \n\t" |
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"addiu %[temp1], %[temp1], 1 \n\t" |
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"sh %[temp1], 0(%[temp0]) \n\t" |
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"lhu %[temp1], 0(%[temp5]) \n\t" |
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"lbu %[temp7], -4(%[temp2]) \n\t" |
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"addiu %[temp2], %[temp2], -4 \n\t" |
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"addiu %[temp1], %[temp1], 1 \n\t" |
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"sh %[temp1], 0(%[temp5]) \n\t" |
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"lhu %[temp1], 0(%[temp6]) \n\t" |
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"sll %[temp7], %[temp7], 1 \n\t" |
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"addu %[temp7], %[mant_cnt], %[temp7] \n\t" |
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"addiu %[temp1], %[temp1],1 \n\t" |
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"sh %[temp1], 0(%[temp6]) \n\t" |
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"lhu %[temp1], 0(%[temp7]) \n\t" |
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"addiu %[temp1], %[temp1], 1 \n\t" |
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"sh %[temp1], 0(%[temp7]) \n\t" |
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"bne %[temp2], %[temp4], 1b \n\t" |
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"4: \n\t" |
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"beqz %[temp3], 2f \n\t" |
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"3: \n\t" |
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"addiu %[temp3], %[temp3], -1 \n\t" |
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"lbu %[temp0], -1(%[temp2]) \n\t" |
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"addiu %[temp2], %[temp2], -1 \n\t" |
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"sll %[temp0], %[temp0], 1 \n\t" |
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"addu %[temp0], %[mant_cnt], %[temp0] \n\t" |
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"lhu %[temp1], 0(%[temp0]) \n\t" |
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"addiu %[temp1], %[temp1], 1 \n\t" |
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"sh %[temp1], 0(%[temp0]) \n\t" |
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"bgtz %[temp3], 3b \n\t" |
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"2: \n\t" |
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: [temp0] "=&r" (temp0), [temp1] "=&r" (temp1), |
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[temp2] "=&r" (temp2), [temp3] "=&r" (temp3), |
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[temp4] "=&r" (temp4), [temp5] "=&r" (temp5), |
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[temp6] "=&r" (temp6), [temp7] "=&r" (temp7) |
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: [len] "r" (len), [bap] "r" (bap), |
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[mant_cnt] "r" (mant_cnt) |
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: "memory" |
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); |
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} |
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#endif |
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#if HAVE_MIPSFPU |
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static void float_to_fixed24_mips(int32_t *dst, const float *src, unsigned int len) |
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{ |
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const float scale = 1 << 24; |
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float src0, src1, src2, src3, src4, src5, src6, src7; |
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int temp0, temp1, temp2, temp3, temp4, temp5, temp6, temp7; |
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do { |
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__asm__ volatile ( |
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"lwc1 %[src0], 0(%[src]) \n\t" |
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"lwc1 %[src1], 4(%[src]) \n\t" |
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"lwc1 %[src2], 8(%[src]) \n\t" |
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"lwc1 %[src3], 12(%[src]) \n\t" |
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"lwc1 %[src4], 16(%[src]) \n\t" |
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"lwc1 %[src5], 20(%[src]) \n\t" |
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"lwc1 %[src6], 24(%[src]) \n\t" |
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"lwc1 %[src7], 28(%[src]) \n\t" |
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"mul.s %[src0], %[src0], %[scale] \n\t" |
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"mul.s %[src1], %[src1], %[scale] \n\t" |
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"mul.s %[src2], %[src2], %[scale] \n\t" |
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"mul.s %[src3], %[src3], %[scale] \n\t" |
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"mul.s %[src4], %[src4], %[scale] \n\t" |
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"mul.s %[src5], %[src5], %[scale] \n\t" |
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"mul.s %[src6], %[src6], %[scale] \n\t" |
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"mul.s %[src7], %[src7], %[scale] \n\t" |
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"cvt.w.s %[src0], %[src0] \n\t" |
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"cvt.w.s %[src1], %[src1] \n\t" |
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"cvt.w.s %[src2], %[src2] \n\t" |
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"cvt.w.s %[src3], %[src3] \n\t" |
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"cvt.w.s %[src4], %[src4] \n\t" |
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"cvt.w.s %[src5], %[src5] \n\t" |
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"cvt.w.s %[src6], %[src6] \n\t" |
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"cvt.w.s %[src7], %[src7] \n\t" |
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"mfc1 %[temp0], %[src0] \n\t" |
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"mfc1 %[temp1], %[src1] \n\t" |
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"mfc1 %[temp2], %[src2] \n\t" |
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"mfc1 %[temp3], %[src3] \n\t" |
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"mfc1 %[temp4], %[src4] \n\t" |
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"mfc1 %[temp5], %[src5] \n\t" |
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"mfc1 %[temp6], %[src6] \n\t" |
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"mfc1 %[temp7], %[src7] \n\t" |
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"sw %[temp0], 0(%[dst]) \n\t" |
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"sw %[temp1], 4(%[dst]) \n\t" |
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"sw %[temp2], 8(%[dst]) \n\t" |
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"sw %[temp3], 12(%[dst]) \n\t" |
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"sw %[temp4], 16(%[dst]) \n\t" |
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"sw %[temp5], 20(%[dst]) \n\t" |
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"sw %[temp6], 24(%[dst]) \n\t" |
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"sw %[temp7], 28(%[dst]) \n\t" |
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: [dst] "+r" (dst), [src] "+r" (src), |
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[src0] "=&f" (src0), [src1] "=&f" (src1), |
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[src2] "=&f" (src2), [src3] "=&f" (src3), |
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[src4] "=&f" (src4), [src5] "=&f" (src5), |
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[src6] "=&f" (src6), [src7] "=&f" (src7), |
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[temp0] "=r" (temp0), [temp1] "=r" (temp1), |
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[temp2] "=r" (temp2), [temp3] "=r" (temp3), |
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[temp4] "=r" (temp4), [temp5] "=r" (temp5), |
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[temp6] "=r" (temp6), [temp7] "=r" (temp7) |
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: [scale] "f" (scale) |
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: "memory" |
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); |
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src = src + 8; |
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dst = dst + 8; |
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len -= 8; |
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} while (len > 0); |
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} |
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static void ac3_downmix_mips(float (*samples)[256], float (*matrix)[2], int out_ch, int in_ch, int len) |
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{ |
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int i, j; |
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float v0, v1, v2, v3; |
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float v4, v5, v6, v7; |
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float samples0, samples1, samples2, samples3, matrix_j, matrix_j2; |
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float *samples_p,*matrix_p; |
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if (out_ch == 2) { |
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for (i = 0; i < len; i += 4) { |
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v0 = v1 = v2 = v3 = 0.0f; |
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v4 = v5 = v6 = v7 = 0.0f; |
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samples_p = &samples[0][i]; |
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matrix_p = &matrix[0][0]; |
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__asm__ volatile ( |
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"move %[j], $zero \n\t" |
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"1: \n\t" |
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"lwc1 %[matrix_j], 0(%[matrix_p]) \n\t" |
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"lwc1 %[matrix_j2], 4(%[matrix_p]) \n\t" |
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"lwc1 %[samples0], 0(%[samples_p]) \n\t" |
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"lwc1 %[samples1], 4(%[samples_p]) \n\t" |
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"lwc1 %[samples2], 8(%[samples_p]) \n\t" |
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"lwc1 %[samples3], 12(%[samples_p]) \n\t" |
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"addiu %[matrix_p], 8 \n\t" |
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"madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t" |
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"madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t" |
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"madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t" |
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"madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t" |
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"madd.s %[v4], %[v4], %[samples0], %[matrix_j2]\n\t" |
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"madd.s %[v5], %[v5], %[samples1], %[matrix_j2]\n\t" |
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"madd.s %[v6], %[v6], %[samples2], %[matrix_j2]\n\t" |
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"madd.s %[v7], %[v7], %[samples3], %[matrix_j2]\n\t" |
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"addiu %[j], 1 \n\t" |
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"addiu %[samples_p], 1024 \n\t" |
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"bne %[j], %[in_ch], 1b \n\t" |
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:[samples0]"=&f"(samples0), [samples1]"=&f"(samples1), |
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[samples2]"=&f"(samples2), [samples3]"=&f"(samples3), |
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[samples_p]"+r"(samples_p), [matrix_j]"=&f"(matrix_j), |
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[matrix_p]"+r"(matrix_p), [v0]"+f"(v0), [v1]"+f"(v1), |
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[v2]"+f"(v2), [v3]"+f"(v3), [v4]"+f"(v4), [v5]"+f"(v5), |
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[v6]"+f"(v6), [v7]"+f"(v7),[j]"=&r"(j), [matrix_j2]"=&f"(matrix_j2) |
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:[in_ch]"r"(in_ch) |
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:"memory" |
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); |
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samples[0][i ] = v0; |
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samples[0][i+1] = v1; |
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samples[0][i+2] = v2; |
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samples[0][i+3] = v3; |
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samples[1][i ] = v4; |
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samples[1][i+1] = v5; |
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samples[1][i+2] = v6; |
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samples[1][i+3] = v7; |
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} |
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} else if (out_ch == 1) { |
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for (i = 0; i < len; i += 4) { |
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v0 = v1 = v2 = v3 = 0.0f; |
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samples_p = &samples[0][i]; |
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matrix_p = &matrix[0][0]; |
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__asm__ volatile ( |
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"move %[j], $zero \n\t" |
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"1: \n\t" |
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"lwc1 %[matrix_j], 0(%[matrix_p]) \n\t" |
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"lwc1 %[samples0], 0(%[samples_p]) \n\t" |
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"lwc1 %[samples1], 4(%[samples_p]) \n\t" |
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"lwc1 %[samples2], 8(%[samples_p]) \n\t" |
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"lwc1 %[samples3], 12(%[samples_p]) \n\t" |
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"addiu %[matrix_p], 8 \n\t" |
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"madd.s %[v0], %[v0], %[samples0], %[matrix_j] \n\t" |
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"madd.s %[v1], %[v1], %[samples1], %[matrix_j] \n\t" |
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"madd.s %[v2], %[v2], %[samples2], %[matrix_j] \n\t" |
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"madd.s %[v3], %[v3], %[samples3], %[matrix_j] \n\t" |
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"addiu %[j], 1 \n\t" |
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"addiu %[samples_p], 1024 \n\t" |
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"bne %[j], %[in_ch], 1b \n\t" |
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:[samples0]"=&f"(samples0), [samples1]"=&f"(samples1), |
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[samples2]"=&f"(samples2), [samples3]"=&f"(samples3), |
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[samples_p]"+r"(samples_p), [matrix_j]"=&f"(matrix_j), |
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[matrix_p]"+r"(matrix_p), [v0]"+f"(v0), [v1]"+f"(v1), |
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[v2]"+f"(v2), [v3]"+f"(v3), [j]"=&r"(j) |
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:[in_ch]"r"(in_ch) |
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:"memory" |
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); |
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samples[0][i ] = v0; |
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samples[0][i+1] = v1; |
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samples[0][i+2] = v2; |
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samples[0][i+3] = v3; |
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} |
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} |
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} |
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#endif |
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#endif /* HAVE_INLINE_ASM */ |
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|
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void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact) { |
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#if HAVE_INLINE_ASM |
||||
#if HAVE_MIPSDSPR1 |
||||
c->bit_alloc_calc_bap = ac3_bit_alloc_calc_bap_mips; |
||||
c->update_bap_counts = ac3_update_bap_counts_mips; |
||||
#endif |
||||
#if HAVE_MIPSFPU |
||||
c->float_to_fixed24 = float_to_fixed24_mips; |
||||
c->downmix = ac3_downmix_mips; |
||||
#endif |
||||
#endif |
||||
|
||||
} |
||||
@ -0,0 +1 @@ |
||||
MIPSFPU-OBJS-$(HAVE_INLINE_ASM) += mips/float_dsp_mips.o
|
||||
@ -0,0 +1,108 @@ |
||||
/*
|
||||
* Copyright (c) 2012 |
||||
* MIPS Technologies, Inc., California. |
||||
* |
||||
* Redistribution and use in source and binary forms, with or without |
||||
* modification, are permitted provided that the following conditions |
||||
* are met: |
||||
* 1. Redistributions of source code must retain the above copyright |
||||
* notice, this list of conditions and the following disclaimer. |
||||
* 2. Redistributions in binary form must reproduce the above copyright |
||||
* notice, this list of conditions and the following disclaimer in the |
||||
* documentation and/or other materials provided with the distribution. |
||||
* 3. Neither the name of the MIPS Technologies, Inc., nor the names of its |
||||
* contributors may be used to endorse or promote products derived from |
||||
* this software without specific prior written permission. |
||||
* |
||||
* THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND |
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE |
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
||||
* SUCH DAMAGE. |
||||
* |
||||
* Author: Branimir Vasic (bvasic@mips.com) |
||||
* |
||||
* This file is part of FFmpeg. |
||||
* |
||||
* FFmpeg is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU Lesser General Public |
||||
* License as published by the Free Software Foundation; either |
||||
* version 2.1 of the License, or (at your option) any later version. |
||||
* |
||||
* FFmpeg is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
||||
* Lesser General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU Lesser General Public |
||||
* License along with FFmpeg; if not, write to the Free Software |
||||
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
||||
*/ |
||||
|
||||
/**
|
||||
* @file |
||||
* Reference: libavutil/float_dsp.c |
||||
*/ |
||||
|
||||
#include "libavutil/float_dsp.h" |
||||
|
||||
static void vector_fmul_mips(float *dst, const float *src0, const float *src1, |
||||
int len) |
||||
{ |
||||
int i; |
||||
|
||||
if (len & 3) { |
||||
for (i = 0; i < len; i++) |
||||
dst[i] = src0[i] * src1[i]; |
||||
} else { |
||||
float *d = (float *)dst; |
||||
float *d_end = d + len; |
||||
float *s0 = (float *)src0; |
||||
float *s1 = (float *)src1; |
||||
|
||||
float src0_0, src0_1, src0_2, src0_3; |
||||
float src1_0, src1_1, src1_2, src1_3; |
||||
|
||||
__asm__ volatile ( |
||||
"1: \n\t" |
||||
"lwc1 %[src0_0], 0(%[s0]) \n\t" |
||||
"lwc1 %[src1_0], 0(%[s1]) \n\t" |
||||
"lwc1 %[src0_1], 4(%[s0]) \n\t" |
||||
"lwc1 %[src1_1], 4(%[s1]) \n\t" |
||||
"lwc1 %[src0_2], 8(%[s0]) \n\t" |
||||
"lwc1 %[src1_2], 8(%[s1]) \n\t" |
||||
"lwc1 %[src0_3], 12(%[s0]) \n\t" |
||||
"lwc1 %[src1_3], 12(%[s1]) \n\t" |
||||
"mul.s %[src0_0], %[src0_0], %[src1_0] \n\t" |
||||
"mul.s %[src0_1], %[src0_1], %[src1_1] \n\t" |
||||
"mul.s %[src0_2], %[src0_2], %[src1_2] \n\t" |
||||
"mul.s %[src0_3], %[src0_3], %[src1_3] \n\t" |
||||
"swc1 %[src0_0], 0(%[d]) \n\t" |
||||
"swc1 %[src0_1], 4(%[d]) \n\t" |
||||
"swc1 %[src0_2], 8(%[d]) \n\t" |
||||
"swc1 %[src0_3], 12(%[d]) \n\t" |
||||
"addiu %[s0], %[s0], 16 \n\t" |
||||
"addiu %[s1], %[s1], 16 \n\t" |
||||
"addiu %[d], %[d], 16 \n\t" |
||||
"bne %[d], %[d_end], 1b \n\t" |
||||
|
||||
: [src0_0]"=&f"(src0_0), [src0_1]"=&f"(src0_1), |
||||
[src0_2]"=&f"(src0_2), [src0_3]"=&f"(src0_3), |
||||
[src1_0]"=&f"(src1_0), [src1_1]"=&f"(src1_1), |
||||
[src1_2]"=&f"(src1_2), [src1_3]"=&f"(src1_3), |
||||
[d]"+r"(d), [s0]"+r"(s0), [s1]"+r"(s1) |
||||
: [d_end]"r"(d_end) |
||||
: "memory" |
||||
); |
||||
} |
||||
} |
||||
|
||||
void ff_float_dsp_init_mips(AVFloatDSPContext *fdsp) { |
||||
fdsp->vector_fmul = vector_fmul_mips; |
||||
} |
||||
Loading…
Reference in new issue