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@ -25,7 +25,7 @@ |
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void powerpc_display_perf_report(void); |
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/* the 604* have 2, the G3* have 4, the G4s have 6,
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and the G5 are completely different (they MUST use |
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POWERPC_MODE_64BITS, and let's hope all future 64 bis PPC |
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HAVE_PPC64, and let's hope all future 64 bis PPC |
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will use the same PMCs... */ |
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#define POWERPC_NUM_PMC_ENABLED 6 |
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/* if you add to the enum below, also add to the perfname array
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@ -68,7 +68,7 @@ enum powerpc_data_index { |
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}; |
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extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total]; |
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#ifndef POWERPC_MODE_64BITS |
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#ifndef HAVE_PPC64 |
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#define POWERP_PMC_DATATYPE unsigned long |
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#define POWERPC_GET_PMC1(a) asm volatile("mfspr %0, 937" : "=r" (a)) |
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#define POWERPC_GET_PMC2(a) asm volatile("mfspr %0, 938" : "=r" (a)) |
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@ -86,7 +86,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
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#define POWERPC_GET_PMC5(a) do {} while (0) |
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#define POWERPC_GET_PMC6(a) do {} while (0) |
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#endif |
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#else /* POWERPC_MODE_64BITS */ |
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#else /* HAVE_PPC64 */ |
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#define POWERP_PMC_DATATYPE unsigned long long |
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#define POWERPC_GET_PMC1(a) asm volatile("mfspr %0, 771" : "=r" (a)) |
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#define POWERPC_GET_PMC2(a) asm volatile("mfspr %0, 772" : "=r" (a)) |
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@ -104,7 +104,7 @@ extern unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][ |
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#define POWERPC_GET_PMC5(a) do {} while (0) |
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#define POWERPC_GET_PMC6(a) do {} while (0) |
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#endif |
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#endif /* POWERPC_MODE_64BITS */ |
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#endif /* HAVE_PPC64 */ |
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#define POWERPC_PERF_DECLARE(a, cond) \ |
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POWERP_PMC_DATATYPE \
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pmc_start[POWERPC_NUM_PMC_ENABLED], \
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