From 896c22ef000b5d122f14c9f85b364e2d21e1f45c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?R=C3=A9mi=20Denis-Courmont?= <remi@remlab.net>
Date: Tue, 23 Jul 2024 18:47:08 +0300
Subject: [PATCH] lavc/vp8dsp: fix RV32 stack alignment

SP must be a multiple of 16 bytes at all times on POSIX - even in leaf
functions - so that signal handlers have a properly aligned stack.
---
 libavcodec/riscv/vp8dsp_rvv.S | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index d366748a0a..7e062d9f13 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -457,14 +457,14 @@ endfunc
 .macro epel_hv len hsize vsize
 func ff_put_vp8_epel\len\()_h\hsize\()v\vsize\()_rvv, zve32x
 #if __riscv_xlen == 64
-        addi            sp, sp, -48
+        addi    sp, sp, -48
         .irp n,0,1,2,3,4,5
-        sd              s\n, \n\()<<3(sp)
+        sd      s\n, (\n * 8)(sp)
         .endr
 #else
-        addi            sp, sp, -24
+        addi    sp, sp, -32
         .irp n,0,1,2,3,4,5
-        sw              s\n, \n\()<<2(sp)
+        sw      s\n, (\n * 4)(sp)
         .endr
 #endif
         sub             a2, a2, a3
@@ -506,14 +506,14 @@ func ff_put_vp8_epel\len\()_h\hsize\()v\vsize\()_rvv, zve32x
 
 #if __riscv_xlen == 64
         .irp n,0,1,2,3,4,5
-        ld              s\n, \n\()<<3(sp)
+        ld      s\n, (\n * 8)(sp)
         .endr
-        addi            sp, sp, 48
+        addi    sp, sp, 48
 #else
         .irp n,0,1,2,3,4,5
-        lw              s\n, \n\()<<2(sp)
+        lw      s\n, (\n * 4)(sp)
         .endr
-        addi            sp, sp, 24
+        addi    sp, sp, 32
 #endif
 
         ret