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@ -1,5 +1,6 @@ |
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;****************************************************************************** |
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;* SIMD lossless video DSP utils |
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;* Copyright (c) 2008 Loren Merritt |
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;* Copyright (c) 2014 Michael Niedermayer |
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;* |
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;* This file is part of FFmpeg. |
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@ -21,6 +22,13 @@ |
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%include "libavutil/x86/x86util.asm" |
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SECTION_RODATA |
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pb_ef: times 8 db 14,15 |
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pb_67: times 8 db 6, 7 |
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pb_zzzz2323zzzzabab: db -1,-1,-1,-1, 2, 3, 2, 3,-1,-1,-1,-1,10,11,10,11 |
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pb_zzzzzzzz67676767: db -1,-1,-1,-1,-1,-1,-1,-1, 6, 7, 6, 7, 6, 7, 6, 7 |
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SECTION_TEXT |
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%macro ADD_INT16_LOOP 1 ; %1 = is_aligned |
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@ -84,3 +92,79 @@ cglobal add_int16, 4,4,5, dst, src, mask, w |
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ADD_INT16_LOOP 1 |
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.unaligned: |
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ADD_INT16_LOOP 0 |
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%macro ADD_HFYU_LEFT_LOOP_INT16 2 ; %1 = dst_is_aligned, %2 = src_is_aligned |
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add wq, wq |
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add srcq, wq |
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add dstq, wq |
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neg wq |
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%%.loop: |
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%if %2 |
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mova m1, [srcq+wq] |
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%else |
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movu m1, [srcq+wq] |
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%endif |
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mova m2, m1 |
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pslld m1, 16 |
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paddw m1, m2 |
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mova m2, m1 |
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pshufb m1, m3 |
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paddw m1, m2 |
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pshufb m0, m5 |
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%if mmsize == 16 |
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mova m2, m1 |
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pshufb m1, m4 |
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paddw m1, m2 |
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%endif |
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paddw m0, m1 |
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pand m0, m7 |
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%if %1 |
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mova [dstq+wq], m0 |
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%else |
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movq [dstq+wq], m0 |
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movhps [dstq+wq+8], m0 |
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%endif |
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add wq, mmsize |
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jl %%.loop |
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mov eax, mmsize-1 |
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sub eax, wd |
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mov wd, eax |
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shl wd, 8 |
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lea eax, [wd+eax-1] |
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movd m1, eax |
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pshufb m0, m1 |
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movd eax, m0 |
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RET |
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%endmacro |
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; int add_hfyu_left_prediction_int16(uint16_t *dst, const uint16_t *src, unsigned mask, int w, int left) |
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INIT_MMX ssse3 |
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cglobal add_hfyu_left_prediction_int16, 4,4,8, dst, src, mask, w, left |
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.skip_prologue: |
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mova m5, [pb_67] |
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mova m3, [pb_zzzz2323zzzzabab] |
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movd m0, leftm |
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psllq m0, 48 |
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movd m7, maskm |
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SPLATW m7 ,m7 |
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ADD_HFYU_LEFT_LOOP_INT16 1, 1 |
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INIT_XMM sse4 |
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cglobal add_hfyu_left_prediction_int16, 4,4,8, dst, src, mask, w, left |
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mova m5, [pb_ef] |
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mova m4, [pb_zzzzzzzz67676767] |
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mova m3, [pb_zzzz2323zzzzabab] |
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movd m0, leftm |
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pslldq m0, 14 |
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movd m7, maskm |
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SPLATW m7 ,m7 |
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test srcq, 15 |
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jnz .src_unaligned |
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test dstq, 15 |
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jnz .dst_unaligned |
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ADD_HFYU_LEFT_LOOP_INT16 1, 1 |
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.dst_unaligned: |
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ADD_HFYU_LEFT_LOOP_INT16 0, 1 |
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.src_unaligned: |
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ADD_HFYU_LEFT_LOOP_INT16 0, 0 |
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