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swscale/x86/input.asm: add x86-optimized planer rgb2yuv functions

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sse2 only operates on 2 lanes per loop for to_y and to_uv functions, due
to the lack of pmulld instruction.  Emulating pmulld with 2 pmuludq and shuffles
proved too costly and made to_uv functions slower then the c implementation.

For to_y on sse2 only float functions are generated,
I was are not able outperform the c implementation on the integer pixel formats.

For to_a on see4 only the float functions are generated.
sse2 and sse4 generated nearly identical performing code on integer pixel formats,
so only sse2/avx2 versions are generated.

planar_gbrp_to_y_512_c: 1197.5
planar_gbrp_to_y_512_sse4: 444.5
planar_gbrp_to_y_512_avx2: 287.5
planar_gbrap_to_y_512_c: 1204.5
planar_gbrap_to_y_512_sse4: 447.5
planar_gbrap_to_y_512_avx2: 289.5
planar_gbrp9be_to_y_512_c: 1380.0
planar_gbrp9be_to_y_512_sse4: 543.5
planar_gbrp9be_to_y_512_avx2: 340.0
planar_gbrp9le_to_y_512_c: 1200.5
planar_gbrp9le_to_y_512_sse4: 442.0
planar_gbrp9le_to_y_512_avx2: 282.0
planar_gbrp10be_to_y_512_c: 1378.5
planar_gbrp10be_to_y_512_sse4: 544.0
planar_gbrp10be_to_y_512_avx2: 337.5
planar_gbrp10le_to_y_512_c: 1200.0
planar_gbrp10le_to_y_512_sse4: 448.0
planar_gbrp10le_to_y_512_avx2: 285.5
planar_gbrap10be_to_y_512_c: 1380.0
planar_gbrap10be_to_y_512_sse4: 542.0
planar_gbrap10be_to_y_512_avx2: 340.5
planar_gbrap10le_to_y_512_c: 1199.0
planar_gbrap10le_to_y_512_sse4: 446.0
planar_gbrap10le_to_y_512_avx2: 289.5
planar_gbrp12be_to_y_512_c: 10563.0
planar_gbrp12be_to_y_512_sse4: 542.5
planar_gbrp12be_to_y_512_avx2: 339.0
planar_gbrp12le_to_y_512_c: 1201.0
planar_gbrp12le_to_y_512_sse4: 440.5
planar_gbrp12le_to_y_512_avx2: 286.0
planar_gbrap12be_to_y_512_c: 1701.5
planar_gbrap12be_to_y_512_sse4: 917.0
planar_gbrap12be_to_y_512_avx2: 338.5
planar_gbrap12le_to_y_512_c: 1201.0
planar_gbrap12le_to_y_512_sse4: 444.5
planar_gbrap12le_to_y_512_avx2: 288.0
planar_gbrp14be_to_y_512_c: 1370.5
planar_gbrp14be_to_y_512_sse4: 545.0
planar_gbrp14be_to_y_512_avx2: 338.5
planar_gbrp14le_to_y_512_c: 1199.0
planar_gbrp14le_to_y_512_sse4: 444.0
planar_gbrp14le_to_y_512_avx2: 279.5
planar_gbrp16be_to_y_512_c: 1364.0
planar_gbrp16be_to_y_512_sse4: 544.5
planar_gbrp16be_to_y_512_avx2: 339.5
planar_gbrp16le_to_y_512_c: 1201.0
planar_gbrp16le_to_y_512_sse4: 445.5
planar_gbrp16le_to_y_512_avx2: 280.5
planar_gbrap16be_to_y_512_c: 1377.0
planar_gbrap16be_to_y_512_sse4: 545.0
planar_gbrap16be_to_y_512_avx2: 338.5
planar_gbrap16le_to_y_512_c: 1201.0
planar_gbrap16le_to_y_512_sse4: 442.0
planar_gbrap16le_to_y_512_avx2: 279.0
planar_gbrpf32be_to_y_512_c: 4113.0
planar_gbrpf32be_to_y_512_sse2: 2438.0
planar_gbrpf32be_to_y_512_sse4: 1068.0
planar_gbrpf32be_to_y_512_avx2: 904.5
planar_gbrpf32le_to_y_512_c: 3818.5
planar_gbrpf32le_to_y_512_sse2: 2024.5
planar_gbrpf32le_to_y_512_sse4: 1241.5
planar_gbrpf32le_to_y_512_avx2: 657.0
planar_gbrapf32be_to_y_512_c: 3707.0
planar_gbrapf32be_to_y_512_sse2: 2444.0
planar_gbrapf32be_to_y_512_sse4: 1077.0
planar_gbrapf32be_to_y_512_avx2: 909.0
planar_gbrapf32le_to_y_512_c: 3822.0
planar_gbrapf32le_to_y_512_sse2: 2024.5
planar_gbrapf32le_to_y_512_sse4: 1176.0
planar_gbrapf32le_to_y_512_avx2: 658.5

planar_gbrp_to_uv_512_c: 2325.8
planar_gbrp_to_uv_512_sse2: 1726.8
planar_gbrp_to_uv_512_sse4: 771.8
planar_gbrp_to_uv_512_avx2: 506.8
planar_gbrap_to_uv_512_c: 2281.8
planar_gbrap_to_uv_512_sse2: 1726.3
planar_gbrap_to_uv_512_sse4: 768.3
planar_gbrap_to_uv_512_avx2: 496.3
planar_gbrp9be_to_uv_512_c: 2336.8
planar_gbrp9be_to_uv_512_sse2: 1924.8
planar_gbrp9be_to_uv_512_sse4: 852.3
planar_gbrp9be_to_uv_512_avx2: 552.8
planar_gbrp9le_to_uv_512_c: 2270.3
planar_gbrp9le_to_uv_512_sse2: 1512.3
planar_gbrp9le_to_uv_512_sse4: 764.3
planar_gbrp9le_to_uv_512_avx2: 491.3
planar_gbrp10be_to_uv_512_c: 2281.8
planar_gbrp10be_to_uv_512_sse2: 1917.8
planar_gbrp10be_to_uv_512_sse4: 855.3
planar_gbrp10be_to_uv_512_avx2: 541.3
planar_gbrp10le_to_uv_512_c: 2269.8
planar_gbrp10le_to_uv_512_sse2: 1515.3
planar_gbrp10le_to_uv_512_sse4: 759.8
planar_gbrp10le_to_uv_512_avx2: 487.8
planar_gbrap10be_to_uv_512_c: 2382.3
planar_gbrap10be_to_uv_512_sse2: 1924.8
planar_gbrap10be_to_uv_512_sse4: 855.3
planar_gbrap10be_to_uv_512_avx2: 540.8
planar_gbrap10le_to_uv_512_c: 2382.3
planar_gbrap10le_to_uv_512_sse2: 1512.3
planar_gbrap10le_to_uv_512_sse4: 759.3
planar_gbrap10le_to_uv_512_avx2: 484.8
planar_gbrp12be_to_uv_512_c: 2283.8
planar_gbrp12be_to_uv_512_sse2: 1936.8
planar_gbrp12be_to_uv_512_sse4: 858.3
planar_gbrp12be_to_uv_512_avx2: 541.3
planar_gbrp12le_to_uv_512_c: 2278.8
planar_gbrp12le_to_uv_512_sse2: 1507.3
planar_gbrp12le_to_uv_512_sse4: 760.3
planar_gbrp12le_to_uv_512_avx2: 485.8
planar_gbrap12be_to_uv_512_c: 2385.3
planar_gbrap12be_to_uv_512_sse2: 1927.8
planar_gbrap12be_to_uv_512_sse4: 855.3
planar_gbrap12be_to_uv_512_avx2: 539.8
planar_gbrap12le_to_uv_512_c: 2377.3
planar_gbrap12le_to_uv_512_sse2: 1516.3
planar_gbrap12le_to_uv_512_sse4: 759.3
planar_gbrap12le_to_uv_512_avx2: 484.8
planar_gbrp14be_to_uv_512_c: 2283.8
planar_gbrp14be_to_uv_512_sse2: 1935.3
planar_gbrp14be_to_uv_512_sse4: 852.3
planar_gbrp14be_to_uv_512_avx2: 540.3
planar_gbrp14le_to_uv_512_c: 2276.8
planar_gbrp14le_to_uv_512_sse2: 1514.8
planar_gbrp14le_to_uv_512_sse4: 762.3
planar_gbrp14le_to_uv_512_avx2: 484.8
planar_gbrp16be_to_uv_512_c: 2383.3
planar_gbrp16be_to_uv_512_sse2: 1881.8
planar_gbrp16be_to_uv_512_sse4: 852.3
planar_gbrp16be_to_uv_512_avx2: 541.8
planar_gbrp16le_to_uv_512_c: 2378.3
planar_gbrp16le_to_uv_512_sse2: 1476.8
planar_gbrp16le_to_uv_512_sse4: 765.3
planar_gbrp16le_to_uv_512_avx2: 485.8
planar_gbrap16be_to_uv_512_c: 2382.3
planar_gbrap16be_to_uv_512_sse2: 1886.3
planar_gbrap16be_to_uv_512_sse4: 853.8
planar_gbrap16be_to_uv_512_avx2: 550.8
planar_gbrap16le_to_uv_512_c: 2381.8
planar_gbrap16le_to_uv_512_sse2: 1488.3
planar_gbrap16le_to_uv_512_sse4: 765.3
planar_gbrap16le_to_uv_512_avx2: 491.8
planar_gbrpf32be_to_uv_512_c: 4863.0
planar_gbrpf32be_to_uv_512_sse2: 3347.5
planar_gbrpf32be_to_uv_512_sse4: 1800.0
planar_gbrpf32be_to_uv_512_avx2: 1199.0
planar_gbrpf32le_to_uv_512_c: 4725.0
planar_gbrpf32le_to_uv_512_sse2: 2753.0
planar_gbrpf32le_to_uv_512_sse4: 1474.5
planar_gbrpf32le_to_uv_512_avx2: 927.5
planar_gbrapf32be_to_uv_512_c: 4859.0
planar_gbrapf32be_to_uv_512_sse2: 3269.0
planar_gbrapf32be_to_uv_512_sse4: 1802.0
planar_gbrapf32be_to_uv_512_avx2: 1201.5
planar_gbrapf32le_to_uv_512_c: 6338.0
planar_gbrapf32le_to_uv_512_sse2: 2756.5
planar_gbrapf32le_to_uv_512_sse4: 1476.0
planar_gbrapf32le_to_uv_512_avx2: 908.5

planar_gbrap_to_a_512_c: 383.3
planar_gbrap_to_a_512_sse2: 66.8
planar_gbrap_to_a_512_avx2: 43.8
planar_gbrap10be_to_a_512_c: 601.8
planar_gbrap10be_to_a_512_sse2: 86.3
planar_gbrap10be_to_a_512_avx2: 34.8
planar_gbrap10le_to_a_512_c: 602.3
planar_gbrap10le_to_a_512_sse2: 48.8
planar_gbrap10le_to_a_512_avx2: 31.3
planar_gbrap12be_to_a_512_c: 601.8
planar_gbrap12be_to_a_512_sse2: 111.8
planar_gbrap12be_to_a_512_avx2: 41.3
planar_gbrap12le_to_a_512_c: 385.8
planar_gbrap12le_to_a_512_sse2: 75.3
planar_gbrap12le_to_a_512_avx2: 39.8
planar_gbrap16be_to_a_512_c: 386.8
planar_gbrap16be_to_a_512_sse2: 79.8
planar_gbrap16be_to_a_512_avx2: 31.3
planar_gbrap16le_to_a_512_c: 600.3
planar_gbrap16le_to_a_512_sse2: 40.3
planar_gbrap16le_to_a_512_avx2: 30.3
planar_gbrapf32be_to_a_512_c: 1148.8
planar_gbrapf32be_to_a_512_sse2: 611.3
planar_gbrapf32be_to_a_512_sse4: 234.8
planar_gbrapf32be_to_a_512_avx2: 183.3
planar_gbrapf32le_to_a_512_c: 851.3
planar_gbrapf32le_to_a_512_sse2: 263.3
planar_gbrapf32le_to_a_512_sse4: 199.3
planar_gbrapf32le_to_a_512_avx2: 156.8

Reviewed-by: Paul B Mahol <onemda@gmail.com>
Signed-off-by: James Almer <jamrial@gmail.com>
release/5.1
Mark Reid 3 years ago committed by James Almer
parent 9e445a5be2
commit 52f7026164
3 changed files with 869 additions and 1 deletions
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  1. 484
      libswscale/x86/input.asm
  2. 170
      libswscale/x86/swscale.c
  3. 216
      tests/checkasm/sw_gbrp.c

484
libswscale/x86/input.asm
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@ -93,7 +93,31 @@ shuf_rgb_12x4: db 0, 0x80, 1, 0x80, 2, 0x80, 3, 0x80, \
6, 0x80, 7, 0x80, 8, 0x80, 9, 0x80
shuf_rgb_3x56: db 2, 0x80, 3, 0x80, 4, 0x80, 5, 0x80, \
8, 0x80, 9, 0x80, 10, 0x80, 11, 0x80
pd_65535f: times 8 dd 65535.0
pb_pack_shuffle16le: db 0, 1, 4, 5, \
8, 9, 12, 13, \
-1, -1, -1, -1, \
-1, -1, -1, -1, \
-1, -1, -1, -1, \
-1, -1, -1, -1, \
0, 1, 4, 5, \
8, 9, 12, 13
pb_shuffle32be: db 3, 2, 1, 0, \
7, 6, 5, 4, \
11, 10, 9, 8, \
15, 14, 13, 12, \
3, 2, 1, 0, \
7, 6, 5, 4, \
11, 10, 9, 8, \
15, 14, 13, 12
pb_shuffle16be: db 1, 0, 3, 2, \
5, 4, 7, 6, \
9, 8, 11, 10, \
13, 12, 15, 14, \
1, 0, 3, 2, \
5, 4, 7, 6, \
9, 8, 11, 10, \
13, 12, 15, 14
SECTION .text
;-----------------------------------------------------------------------------
@ -738,3 +762,461 @@ YUYV_TO_UV_FN 3, uyvy, 1
NVXX_TO_UV_FN 5, nv12
NVXX_TO_UV_FN 5, nv21
%endif
%if ARCH_X86_64
%define RY_IDX 0
%define GY_IDX 1
%define BY_IDX 2
%define RU_IDX 3
%define GU_IDX 4
%define BU_IDX 5
%define RV_IDX 6
%define GV_IDX 7
%define BV_IDX 8
%define RGB2YUV_SHIFT 15
%define R m0
%define G m1
%define B m2
%macro SWAP32 1
%if mmsize > 16 || cpuflag(sse4)
pshufb m%1, [pb_shuffle32be]
%else
psrlw xm7, xm%1, 8
psllw xm%1, 8
por xm%1, xm7
pshuflw xm%1, xm%1, (2 << 6 | 3 << 4 | 0 << 2 | 1 << 0)
pshufhw xm%1, xm%1, (2 << 6 | 3 << 4 | 0 << 2 | 1 << 0)
%endif
%endmacro
; 1 - dest
; 2 - source
; 3 - is big endian
; 4 - load only 2 values on sse2
%macro LOADF32 4
%if notcpuflag(sse4) && %4
%if %3 ; big endian
mov tmp1q, %2
bswap tmp1q
movq xm%1, tmp1q
%else
movq m%1, %2
%endif
%else
movu m%1, %2
%if %3
SWAP32 %1
%endif
%endif
maxps m%1, m9 ; 0.0 (nan, -inf) -> 0.0
mulps m%1, m8 ; [pd_65535f]
minps m%1, m8 ; +inf -> 65535
; cvtps2dq rounds to nearest int
; assuming mxcsr register is default rounding
; 0.40 -> 0.0, 0.50 -> 0.0, 0.51 -> 1.0
cvtps2dq m%1, m%1
%if notcpuflag(sse4) && %4
; line up the 2 values in lanes 0,2
%if %3 ; big endian
pshufd m%1, m%1, (3 << 6 | 0 << 4 | 2 << 2 | 1 << 0)
%else
pshufd m%1, m%1, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
%endif
%endif
%endmacro
; 1 - dest
; 2 - source
; 3 - is big endian
%macro LOAD16 3
%if cpuflag(sse4) || mmsize > 16
pmovzxwd m%1, %2
%if %3 ; bigendian
pshufb m%1, m8 ; [pb_shuffle16be]
%endif
%else
%if %3 ; bigendian
mov tmp1d, dword %2
bswap tmp1d
movd xm%1, tmp1d
pshuflw m%1, m%1, (3 << 6 | 0 << 4 | 3 << 2 | 1 << 0)
pshufd m%1, m%1, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
%else
movd xm%1, %2
punpcklwd m%1, m9 ; interleave words with zero
pshufd m%1, m%1, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
%endif
%endif
%endmacro
%macro LOAD8_RGB 0
%if cpuflag(sse4) || mmsize > 16
pmovzxbd R, [srcRq + xq]
pmovzxbd G, [srcGq + xq]
pmovzxbd B, [srcBq + xq]
%else
; thought this would be faster but from my measurments its not
; movd m0, [srcRq + xq + 0]; overeads by 2 bytes
; punpcklbw m0, m9 ; interleave bytes with zero
; punpcklwd m0, m9 ; interleave words with zero
; pshufd m0, m0, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
movzx tmp2q, byte [srcRq + xq + 1]
movzx tmp1q, byte [srcRq + xq + 0]
shl tmp2q, 32
or tmp1q, tmp2q
movq xm0, tmp1q
movzx tmp2q, byte [srcGq + xq + 1]
movzx tmp3q, byte [srcGq + xq + 0]
shl tmp2q, 32
or tmp3q, tmp2q
movq xm1, tmp3q
movzx tmp2q, byte [srcBq + xq + 1]
movzx tmp1q, byte [srcBq + xq + 0]
shl tmp2q, 32
or tmp1q, tmp2q
movq xm2, tmp1q
pshufd m0, m0, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
pshufd m1, m1, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
pshufd m2, m2, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
%endif
%endmacro
; 1 - dest
; 2 - source
; 3 - store only 2 values on sse2
%macro STORE16 3
%if %3 && notcpuflag(sse4)
pshufd m%2, m%2, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
pshuflw m%2, m%2, (3 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
movd %1, m%2
%elif mmsize > 16
pshufb m%2, m7 ; [pb_pack_shuffle16le]
vpermq m%2, m%2, (3 << 6 | 0 << 4 | 3 << 2 | 0 << 0)
movu %1, xm%2
%else
%if cpuflag(sse4)
pshufb m%2, m7 ; [pb_pack_shuffle16le]
%else
pshuflw m%2, m%2, (1 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
pshufhw m%2, m%2, (1 << 6 | 1 << 4 | 2 << 2 | 0 << 0)
pshufd m%2, m%2, (3 << 6 | 3 << 4 | 2 << 2 | 0 << 0)
%endif
movq %1, m%2
%endif
%endmacro
%macro PMUL 3
%if cpuflag(sse4) || mmsize > 16
pmulld %1, %2, %3
%else
pmuludq %1, %2, %3
%endif
%endmacro
; 1 - name
; 2 - depth
; 3 - is big endian
; 4 - is float
; in sse2 mode only 2 values are done per loop, due to lack of pmulld instruction
%macro planar_rgb_to_y_fn 4
%if %2 == 8
%define OFFSET (0x801<<(RGB2YUV_SHIFT-7))
%define RSHIFT (RGB2YUV_SHIFT-6)
%else
%if %2 < 16
%define SHIFT %2
%define BPC %2
%else
%define SHIFT 14
%define BPC 16
%endif
%define OFFSET ((16 << (RGB2YUV_SHIFT + BPC - 8)) + (1 << (RGB2YUV_SHIFT + SHIFT - 15)))
%define RSHIFT (RGB2YUV_SHIFT + SHIFT - 14)
%endif
cglobal planar_%1_to_y, 4, 12, 13, dst, src, w, rgb2yuv, srcR, srcG, srcB, x, tmp1, tmp2, tmp3, tmp4
VBROADCASTSS m10, dword [rgb2yuvq + RY_IDX*4] ; ry
VBROADCASTSS m11, dword [rgb2yuvq + GY_IDX*4] ; gy
VBROADCASTSS m12, dword [rgb2yuvq + BY_IDX*4] ; by
pxor m9, m9
%if %4
movu m8, [pd_65535f]
%endif
%if cpuflag(sse4) || mmsize > 16
movu m7, [pb_pack_shuffle16le]
%if %3 && %2 > 8 && %2 <= 16
movu m8, [pb_shuffle16be]
%endif
%endif
mov xq, OFFSET
movq xm6, xq
VBROADCASTSS m6, xm6
mov srcGq, [srcq + 0]
mov srcBq, [srcq + 8]
mov srcRq, [srcq + 16]
xor xq, xq
%%loop_x:
%if %4
LOADF32 0, [srcRq + xq*4], %3, 1
LOADF32 1, [srcGq + xq*4], %3, 1
LOADF32 2, [srcBq + xq*4], %3, 1
%elif %2 == 8
LOAD8_RGB
%else
LOAD16 0, [srcRq + xq*2], %3
LOAD16 1, [srcGq + xq*2], %3
LOAD16 2, [srcBq + xq*2], %3
%endif
PMUL R, R, m10 ; r*ry
PMUL G, G, m11 ; g*gy
PMUL B, B, m12 ; b*by
paddd m0, m6 ; + OFFSET
paddd B, G
paddd m0, B
psrad m0, RSHIFT
STORE16 [dstq + 2*xq], 0, 1
%if cpuflag(avx2) || cpuflag(sse4)
add xq, mmsize/4
%else
add xd, 2
%endif
cmp xd, wd
jl %%loop_x
RET
%endmacro
; 1 - name
; 2 - depth
; 3 - is big endian
; 4 - is float
; in sse2 mode only 2 values are done per loop, due to lack of pmulld instruction
%macro planar_rgb_to_uv_fn 4
%if %2 == 8
%define OFFSET (0x4001<<(RGB2YUV_SHIFT-7))
%define RSHIFT (RGB2YUV_SHIFT-6)
%else
%if %2 < 16
%define SHIFT %2
%define BPC %2
%else
%define SHIFT 14
%define BPC 16
%endif
%define OFFSET ((128 << (RGB2YUV_SHIFT + BPC - 8)) + (1 << (RGB2YUV_SHIFT + SHIFT - 15)))
%define RSHIFT (RGB2YUV_SHIFT + SHIFT - 14)
%endif
cglobal planar_%1_to_uv, 5, 12, 16, dstU, dstV, src, w, rgb2yuv, srcR, srcG, srcB, x, tmp1, tmp2, tmp3
VBROADCASTSS m10, dword [rgb2yuvq + RU_IDX*4] ; ru
VBROADCASTSS m11, dword [rgb2yuvq + GU_IDX*4] ; gu
VBROADCASTSS m12, dword [rgb2yuvq + BU_IDX*4] ; bu
VBROADCASTSS m13, dword [rgb2yuvq + RV_IDX*4] ; rv
VBROADCASTSS m14, dword [rgb2yuvq + GV_IDX*4] ; gv
VBROADCASTSS m15, dword [rgb2yuvq + BV_IDX*4] ; bv
pxor m9, m9
%if %4
movu m8, [pd_65535f]
%endif
%if cpuflag(sse4) || mmsize > 16
movu m7, [pb_pack_shuffle16le]
%if %3 && %2 > 8 && %2 <= 16
movu m8, [pb_shuffle16be]
%endif
%endif
mov xq, OFFSET
movq xm6, xq
VBROADCASTSS m6, xm6
mov srcGq, [srcq + 0]
mov srcBq, [srcq + 8]
mov srcRq, [srcq + 16]
xor xq, xq
%%loop_x:
%if %4
LOADF32 0, [srcRq + xq*4], %3, 1
LOADF32 1, [srcGq + xq*4], %3, 1
LOADF32 2, [srcBq + xq*4], %3, 1
%elif %2 == 8
LOAD8_RGB
%else
LOAD16 0, [srcRq + xq*2], %3
LOAD16 1, [srcGq + xq*2], %3
LOAD16 2, [srcBq + xq*2], %3
%endif
PMUL m5, R, m10 ; r*ru
PMUL m4, G, m11 ; b*gu
paddd m4, m5
PMUL m5, B, m12 ; b*bu
paddd m4, m6 ; + OFFSET
paddd m4, m5
psrad m4, RSHIFT
STORE16 [dstUq + 2*xq], 4, 1
PMUL R, R, m13 ; r*rv
PMUL G, G, m14 ; g*gv*g
PMUL B, B, m15 ; b*bv
paddd m0, m6 ; + OFFSET
paddd B, G
paddd m0, B
psrad m0, RSHIFT
STORE16 [dstVq + 2*xq], 0, 1
%if cpuflag(avx2) || cpuflag(sse4)
add xd, mmsize/4
%else
add xd, 2
%endif
cmp xd, wd
jl %%loop_x
RET
%endmacro
; 1 - name
; 2 - depth
; 3 - is big endian
; 4 - is float
%macro planar_rgb_to_a_fn 4
cglobal planar_%1_to_a, 4, 6, 10, dst, src, w, rgb2yuv, srcA, x
%if %4 && (cpuflag(sse4) || mmsize > 16)
movu m7, [pb_pack_shuffle16le]
%elif %3 && (cpuflag(sse4) || mmsize > 16)
movu m7, [pb_shuffle16be]
%endif
%if %4
movu m8, [pd_65535f]
%endif
pxor m9, m9
mov srcAq, [srcq + 24]
xor xq, xq
%%loop_x:
%if %4 ; float
LOADF32 0, [srcAq + xq*4], %3, 0
STORE16 [dstq + xq*2], 0, 0
add xq, mmsize/4
%elif %2 == 8
; only need to convert 8bit value to 16bit
%if cpuflag(sse4) || mmsize > 16
pmovzxbw m0, [srcAq + xq]
%else
movsd m0, [srcAq + xq]
punpcklbw m0, m9 ; interleave bytes with zero
%endif
psllw m0, 6
movu [dstq + xq*2], m0
add xq, mmsize/2
%else
; only need to convert 16bit format to 16le
movu m0, [srcAq + xq*2]
%if %3 ; bigendian
%if cpuflag(sse4) || mmsize > 16
pshufb m0, m7 ; [pb_shuffle16be]
%else
psrlw m7, m0, 8
psllw m0, 8
por m0, m7
%endif
%endif
%if %2 < 16
psllw m0, (14 - %2)
%endif
movu [dstq + xq*2], m0
add xq, mmsize/2
%endif
cmp xd, wd
jl %%loop_x
RET
%endmacro
; 1 - name
; 2 - depth
; 3 - is float
%macro planer_rgbxx_y_fn_decl 3
planar_rgb_to_y_fn %1le, %2, 0, %3
planar_rgb_to_y_fn %1be, %2, 1, %3
%endmacro
; 1 - name
; 2 - depth
; 3 - is float
%macro planer_rgbxx_uv_fn_decl 3
planar_rgb_to_uv_fn %1le, %2, 0, %3
planar_rgb_to_uv_fn %1be, %2, 1, %3
%endmacro
; 1 - name
; 2 - depth
; 3 - is float
%macro planer_rgbxx_a_fn_decl 3
planar_rgb_to_a_fn %1le, %2, 0, %3
planar_rgb_to_a_fn %1be, %2, 1, %3
%endmacro
%macro planar_rgb_y_all_fn_decl 0
planar_rgb_to_y_fn rgb, 8, 0, 0
planer_rgbxx_y_fn_decl rgb9, 9, 0
planer_rgbxx_y_fn_decl rgb10, 10, 0
planer_rgbxx_y_fn_decl rgb12, 12, 0
planer_rgbxx_y_fn_decl rgb14, 14, 0
planer_rgbxx_y_fn_decl rgb16, 16, 0
planer_rgbxx_y_fn_decl rgbf32, 32, 1
%endmacro
%macro planar_rgb_uv_all_fn_decl 0
planar_rgb_to_uv_fn rgb, 8, 0, 0
planer_rgbxx_uv_fn_decl rgb9, 9, 0
planer_rgbxx_uv_fn_decl rgb10, 10, 0
planer_rgbxx_uv_fn_decl rgb12, 12, 0
planer_rgbxx_uv_fn_decl rgb14, 14, 0
planer_rgbxx_uv_fn_decl rgb16, 16, 0
planer_rgbxx_uv_fn_decl rgbf32, 32, 1
%endmacro
%macro planar_rgb_a_all_fn_decl 0
planar_rgb_to_a_fn rgb, 8, 0, 0
planer_rgbxx_a_fn_decl rgb10, 10, 0
planer_rgbxx_a_fn_decl rgb12, 12, 0
planer_rgbxx_a_fn_decl rgb16, 16, 0
planer_rgbxx_a_fn_decl rgbf32, 32, 1
%endmacro
; sse2 to_y only matches c speed with current implementation
; except on floating point formats
INIT_XMM sse2
planer_rgbxx_y_fn_decl rgbf32, 32, 1
planar_rgb_uv_all_fn_decl
planar_rgb_a_all_fn_decl
; sse4 to_a conversions are just the sse2 ones
; except on floating point formats
INIT_XMM sse4
planar_rgb_y_all_fn_decl
planar_rgb_uv_all_fn_decl
planer_rgbxx_a_fn_decl rgbf32, 32, 1
%if HAVE_AVX2_EXTERNAL
INIT_YMM avx2
planar_rgb_y_all_fn_decl
planar_rgb_uv_all_fn_decl
planar_rgb_a_all_fn_decl
%endif
%endif ; ARCH_X86_64

170
libswscale/x86/swscale.c
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@ -390,6 +390,80 @@ YUV2GBRP_DECL(sse2);
YUV2GBRP_DECL(sse4);
YUV2GBRP_DECL(avx2);
#define INPUT_PLANAR_RGB_Y_FN_DECL(fmt, opt) \
void ff_planar_##fmt##_to_y_##opt(uint8_t *dst, \
const uint8_t *src[4], int w, int32_t *rgb2yuv)
#define INPUT_PLANAR_RGB_UV_FN_DECL(fmt, opt) \
void ff_planar_##fmt##_to_uv_##opt(uint8_t *dstU, uint8_t *dstV, \
const uint8_t *src[4], int w, int32_t *rgb2yuv)
#define INPUT_PLANAR_RGB_A_FN_DECL(fmt, opt) \
void ff_planar_##fmt##_to_a_##opt(uint8_t *dst, \
const uint8_t *src[4], int w, int32_t *rgb2yuv)
#define INPUT_PLANAR_RGBXX_A_DECL(fmt, opt) \
INPUT_PLANAR_RGB_A_FN_DECL(fmt##le, opt); \
INPUT_PLANAR_RGB_A_FN_DECL(fmt##be, opt);
#define INPUT_PLANAR_RGBXX_Y_DECL(fmt, opt) \
INPUT_PLANAR_RGB_Y_FN_DECL(fmt##le, opt); \
INPUT_PLANAR_RGB_Y_FN_DECL(fmt##be, opt);
#define INPUT_PLANAR_RGBXX_UV_DECL(fmt, opt) \
INPUT_PLANAR_RGB_UV_FN_DECL(fmt##le, opt); \
INPUT_PLANAR_RGB_UV_FN_DECL(fmt##be, opt);
#define INPUT_PLANAR_RGBXX_YUVA_DECL(fmt, opt) \
INPUT_PLANAR_RGBXX_Y_DECL(fmt, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(fmt, opt); \
INPUT_PLANAR_RGBXX_A_DECL(fmt, opt);
#define INPUT_PLANAR_RGBXX_YUV_DECL(fmt, opt) \
INPUT_PLANAR_RGBXX_Y_DECL(fmt, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(fmt, opt);
#define INPUT_PLANAR_RGBXX_UVA_DECL(fmt, opt) \
INPUT_PLANAR_RGBXX_UV_DECL(fmt, opt); \
INPUT_PLANAR_RGBXX_A_DECL(fmt, opt);
#define INPUT_PLANAR_RGB_A_ALL_DECL(opt) \
INPUT_PLANAR_RGB_A_FN_DECL(rgb, opt); \
INPUT_PLANAR_RGBXX_A_DECL(rgb10, opt); \
INPUT_PLANAR_RGBXX_A_DECL(rgb12, opt); \
INPUT_PLANAR_RGBXX_A_DECL(rgb16, opt); \
INPUT_PLANAR_RGBXX_A_DECL(rgbf32, opt);
#define INPUT_PLANAR_RGB_Y_ALL_DECL(opt) \
INPUT_PLANAR_RGB_Y_FN_DECL(rgb, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgb9, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgb10, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgb12, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgb14, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgb16, opt); \
INPUT_PLANAR_RGBXX_Y_DECL(rgbf32, opt);
#define INPUT_PLANAR_RGB_UV_ALL_DECL(opt) \
INPUT_PLANAR_RGB_UV_FN_DECL(rgb, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgb9, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgb10, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgb12, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgb14, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgb16, opt); \
INPUT_PLANAR_RGBXX_UV_DECL(rgbf32, opt);
INPUT_PLANAR_RGBXX_Y_DECL(rgbf32, sse2);
INPUT_PLANAR_RGB_UV_ALL_DECL(sse2);
INPUT_PLANAR_RGB_A_ALL_DECL(sse2);
INPUT_PLANAR_RGB_Y_ALL_DECL(sse4);
INPUT_PLANAR_RGB_UV_ALL_DECL(sse4);
INPUT_PLANAR_RGBXX_A_DECL(rgbf32, sse4);
INPUT_PLANAR_RGB_Y_ALL_DECL(avx2);
INPUT_PLANAR_RGB_UV_ALL_DECL(avx2);
INPUT_PLANAR_RGB_A_ALL_DECL(avx2);
#endif
av_cold void ff_sws_init_swscale_x86(SwsContext *c)
@ -639,6 +713,102 @@ switch(c->dstBpc){ \
}
}
#define INPUT_PLANER_RGB_A_FUNC_CASE(fmt, name, opt) \
case fmt: \
c->readAlpPlanar = ff_planar_##name##_to_a_##opt;
#define INPUT_PLANER_RGBA_YUV_FUNC_CASE(rgb_fmt, rgba_fmt, name, opt) \
case rgba_fmt: \
case rgb_fmt: \
c->readLumPlanar = ff_planar_##name##_to_y_##opt; \
c->readChrPlanar = ff_planar_##name##_to_uv_##opt; \
break;
#define INPUT_PLANER_RGB_YUV_FUNC_CASE(fmt, name, opt) \
case fmt: \
c->readLumPlanar = ff_planar_##name##_to_y_##opt; \
c->readChrPlanar = ff_planar_##name##_to_uv_##opt; \
break;
#define INPUT_PLANER_RGB_UV_FUNC_CASE(fmt, name, opt) \
case fmt: \
c->readChrPlanar = ff_planar_##name##_to_uv_##opt; \
break;
#define INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(rgb_fmt, rgba_fmt, name, opt) \
INPUT_PLANER_RGB_A_FUNC_CASE(rgba_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_YUV_FUNC_CASE(rgb_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_A_FUNC_CASE(rgba_fmt##BE, name##be, opt) \
INPUT_PLANER_RGB_YUV_FUNC_CASE(rgb_fmt##BE, name##be, opt)
#define INPUT_PLANER_RGBAXX_UVA_FUNC_CASE(rgb_fmt, rgba_fmt, name, opt) \
INPUT_PLANER_RGB_A_FUNC_CASE(rgba_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_UV_FUNC_CASE(rgb_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_A_FUNC_CASE(rgba_fmt##BE, name##be, opt) \
INPUT_PLANER_RGB_UV_FUNC_CASE(rgb_fmt##BE, name##be, opt)
#define INPUT_PLANER_RGBAXX_YUV_FUNC_CASE(rgb_fmt, rgba_fmt, name, opt) \
INPUT_PLANER_RGBA_YUV_FUNC_CASE(rgb_fmt##LE, rgba_fmt##LE, name##le, opt) \
INPUT_PLANER_RGBA_YUV_FUNC_CASE(rgb_fmt##BE, rgba_fmt##BE, name##be, opt)
#define INPUT_PLANER_RGBXX_YUV_FUNC_CASE(rgb_fmt, name, opt) \
INPUT_PLANER_RGB_YUV_FUNC_CASE(rgb_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_YUV_FUNC_CASE(rgb_fmt##BE, name##be, opt)
#define INPUT_PLANER_RGBXX_UV_FUNC_CASE(rgb_fmt, name, opt) \
INPUT_PLANER_RGB_UV_FUNC_CASE(rgb_fmt##LE, name##le, opt) \
INPUT_PLANER_RGB_UV_FUNC_CASE(rgb_fmt##BE, name##be, opt)
#define INPUT_PLANER_RGB_YUVA_ALL_CASES(opt) \
INPUT_PLANER_RGB_A_FUNC_CASE( AV_PIX_FMT_GBRAP, rgb, opt) \
INPUT_PLANER_RGB_YUV_FUNC_CASE( AV_PIX_FMT_GBRP, rgb, opt) \
INPUT_PLANER_RGBXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP9, rgb9, opt) \
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRP10, AV_PIX_FMT_GBRAP10, rgb10, opt) \
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRP12, AV_PIX_FMT_GBRAP12, rgb12, opt) \
INPUT_PLANER_RGBXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP14, rgb14, opt) \
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRP16, AV_PIX_FMT_GBRAP16, rgb16, opt) \
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRPF32, AV_PIX_FMT_GBRAPF32, rgbf32, opt)
if (EXTERNAL_SSE2(cpu_flags)) {
switch (c->srcFormat) {
INPUT_PLANER_RGB_A_FUNC_CASE( AV_PIX_FMT_GBRAP, rgb, sse2);
INPUT_PLANER_RGB_UV_FUNC_CASE( AV_PIX_FMT_GBRP, rgb, sse2);
INPUT_PLANER_RGBXX_UV_FUNC_CASE( AV_PIX_FMT_GBRP9, rgb9, sse2);
INPUT_PLANER_RGBAXX_UVA_FUNC_CASE( AV_PIX_FMT_GBRP10, AV_PIX_FMT_GBRAP10, rgb10, sse2);
INPUT_PLANER_RGBAXX_UVA_FUNC_CASE( AV_PIX_FMT_GBRP12, AV_PIX_FMT_GBRAP12, rgb12, sse2);
INPUT_PLANER_RGBXX_UV_FUNC_CASE( AV_PIX_FMT_GBRP14, rgb14, sse2);
INPUT_PLANER_RGBAXX_UVA_FUNC_CASE( AV_PIX_FMT_GBRP16, AV_PIX_FMT_GBRAP16, rgb16, sse2);
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRPF32, AV_PIX_FMT_GBRAPF32, rgbf32, sse2);
default:
break;
}
}
if (EXTERNAL_SSE4(cpu_flags)) {
switch (c->srcFormat) {
case AV_PIX_FMT_GBRAP:
INPUT_PLANER_RGB_YUV_FUNC_CASE( AV_PIX_FMT_GBRP, rgb, sse4);
INPUT_PLANER_RGBXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP9, rgb9, sse4);
INPUT_PLANER_RGBAXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP10, AV_PIX_FMT_GBRAP10, rgb10, sse4);
INPUT_PLANER_RGBAXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP12, AV_PIX_FMT_GBRAP12, rgb12, sse4);
INPUT_PLANER_RGBXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP14, rgb14, sse4);
INPUT_PLANER_RGBAXX_YUV_FUNC_CASE( AV_PIX_FMT_GBRP16, AV_PIX_FMT_GBRAP16, rgb16, sse4);
INPUT_PLANER_RGBAXX_YUVA_FUNC_CASE(AV_PIX_FMT_GBRPF32, AV_PIX_FMT_GBRAPF32, rgbf32, sse4);
default:
break;
}
}
if (EXTERNAL_AVX2_FAST(cpu_flags)) {
switch (c->srcFormat) {
INPUT_PLANER_RGB_YUVA_ALL_CASES(avx2)
default:
break;
}
}
if(c->flags & SWS_FULL_CHR_H_INT) {
/* yuv2gbrp uses the SwsContext for yuv coefficients

216
tests/checkasm/sw_gbrp.c
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@ -190,9 +190,225 @@ static void check_output_yuv2gbrp(void)
sws_freeContext(ctx);
}
#undef LARGEST_INPUT_SIZE
#undef INPUT_SIZES
static void check_input_planar_rgb_to_y(void)
{
struct SwsContext *ctx;
const AVPixFmtDescriptor *desc;
int fmi, isi;
int dstW, byte_size;
#define LARGEST_INPUT_SIZE 512
#define INPUT_SIZES 6
static const int input_sizes[] = {8, 24, 128, 144, 256, 512};
uint8_t *src[4];
int32_t rgb2yuv[9] = {0};
declare_func(void, uint8_t *dst, uint8_t *src[4], int w, int32_t *rgb2yuv);
LOCAL_ALIGNED_8(int32_t, src_r, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_g, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_b, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_a, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(uint8_t, dst0_y, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
LOCAL_ALIGNED_8(uint8_t, dst1_y, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
randomize_buffers((uint8_t*)src_r, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_g, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_b, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_a, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)rgb2yuv, 9 * sizeof(int32_t));
src[0] = (uint8_t*)src_g;
src[1] = (uint8_t*)src_b;
src[2] = (uint8_t*)src_r;
src[3] = (uint8_t*)src_a;
ctx = sws_alloc_context();
if (sws_init_context(ctx, NULL, NULL) < 0)
fail();
for (fmi = 0; fmi < FF_ARRAY_ELEMS(planar_fmts); fmi++) {
for (isi = 0; isi < INPUT_SIZES; isi++ ) {
desc = av_pix_fmt_desc_get(planar_fmts[fmi]);
ctx->srcFormat = planar_fmts[fmi];
ctx->dstFormat = AV_PIX_FMT_YUVA444P16;
byte_size = 2;
dstW = input_sizes[isi];
ff_sws_init_scale(ctx);
if(check_func(ctx->readLumPlanar, "planar_%s_to_y_%d", desc->name, dstW)) {
memset(dst0_y, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
memset(dst1_y, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
call_ref(dst0_y, src, dstW, rgb2yuv);
call_new(dst1_y, src, dstW, rgb2yuv);
if (memcmp(dst0_y, dst1_y, dstW * byte_size))
fail();
bench_new(dst1_y, src, dstW, rgb2yuv);
}
}
}
sws_freeContext(ctx);
}
#undef LARGEST_INPUT_SIZE
#undef INPUT_SIZES
static void check_input_planar_rgb_to_uv(void)
{
struct SwsContext *ctx;
const AVPixFmtDescriptor *desc;
int fmi, isi;
int dstW, byte_size;
#define LARGEST_INPUT_SIZE 512
#define INPUT_SIZES 6
static const int input_sizes[] = {8, 24, 128, 144, 256, 512};
uint8_t *src[4];
int32_t rgb2yuv[9] = {0};
declare_func(void, uint8_t *dstU, uint8_t *dstV,
uint8_t *src[4], int w, int32_t *rgb2yuv);
LOCAL_ALIGNED_8(int32_t, src_r, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_g, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_b, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_a, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(uint8_t, dst0_u, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
LOCAL_ALIGNED_8(uint8_t, dst0_v, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
LOCAL_ALIGNED_8(uint8_t, dst1_u, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
LOCAL_ALIGNED_8(uint8_t, dst1_v, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
randomize_buffers((uint8_t*)src_r, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_g, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_b, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_a, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)rgb2yuv, 9 * sizeof(int32_t));
src[0] = (uint8_t*)src_g;
src[1] = (uint8_t*)src_b;
src[2] = (uint8_t*)src_r;
src[3] = (uint8_t*)src_a;
ctx = sws_alloc_context();
if (sws_init_context(ctx, NULL, NULL) < 0)
fail();
for (fmi = 0; fmi < FF_ARRAY_ELEMS(planar_fmts); fmi++) {
for (isi = 0; isi < INPUT_SIZES; isi++ ) {
desc = av_pix_fmt_desc_get(planar_fmts[fmi]);
ctx->srcFormat = planar_fmts[fmi];
ctx->dstFormat = AV_PIX_FMT_YUVA444P16;
byte_size = 2;
dstW = input_sizes[isi];
ff_sws_init_scale(ctx);
if(check_func(ctx->readChrPlanar, "planar_%s_to_uv_%d", desc->name, dstW)) {
memset(dst0_u, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
memset(dst0_v, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
memset(dst1_u, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
memset(dst1_v, 0xFF, LARGEST_INPUT_SIZE * sizeof(int32_t));
call_ref(dst0_u, dst0_v, src, dstW, rgb2yuv);
call_new(dst1_u, dst1_v, src, dstW, rgb2yuv);
if (memcmp(dst0_u, dst1_u, dstW * byte_size) ||
memcmp(dst0_v, dst1_v, dstW * byte_size))
fail();
bench_new(dst1_u, dst1_v, src, dstW, rgb2yuv);
}
}
}
sws_freeContext(ctx);
}
#undef LARGEST_INPUT_SIZE
#undef INPUT_SIZES
static void check_input_planar_rgb_to_a(void)
{
struct SwsContext *ctx;
const AVPixFmtDescriptor *desc;
int fmi, isi;
int dstW, byte_size;
#define LARGEST_INPUT_SIZE 512
#define INPUT_SIZES 6
static const int input_sizes[] = {8, 24, 128, 144, 256, 512};
uint8_t *src[4];
int32_t rgb2yuv[9] = {0};
declare_func(void, uint8_t *dst, uint8_t *src[4], int w, int32_t *rgb2yuv);
LOCAL_ALIGNED_8(int32_t, src_r, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_g, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_b, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(int32_t, src_a, [LARGEST_INPUT_SIZE]);
LOCAL_ALIGNED_8(uint8_t, dst0_a, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
LOCAL_ALIGNED_8(uint8_t, dst1_a, [LARGEST_INPUT_SIZE * sizeof(int32_t)]);
randomize_buffers((uint8_t*)src_r, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_g, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_b, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)src_a, LARGEST_INPUT_SIZE * sizeof(int32_t));
randomize_buffers((uint8_t*)rgb2yuv, 9 * sizeof(int32_t));
src[0] = (uint8_t*)src_g;
src[1] = (uint8_t*)src_b;
src[2] = (uint8_t*)src_r;
src[3] = (uint8_t*)src_a;
ctx = sws_alloc_context();
if (sws_init_context(ctx, NULL, NULL) < 0)
fail();
for (fmi = 0; fmi < FF_ARRAY_ELEMS(planar_fmts); fmi++) {
for (isi = 0; isi < INPUT_SIZES; isi++ ) {
desc = av_pix_fmt_desc_get(planar_fmts[fmi]);
if (!(desc->flags & AV_PIX_FMT_FLAG_ALPHA))
continue;
ctx->srcFormat = planar_fmts[fmi];
ctx->dstFormat = AV_PIX_FMT_YUVA444P16;
byte_size = 2;
dstW = input_sizes[isi];
ff_sws_init_scale(ctx);
if(check_func(ctx->readAlpPlanar, "planar_%s_to_a_%d", desc->name, dstW)) {
memset(dst0_a, 0x00, LARGEST_INPUT_SIZE * sizeof(int32_t));
memset(dst1_a, 0x00, LARGEST_INPUT_SIZE * sizeof(int32_t));
call_ref(dst0_a, src, dstW, rgb2yuv);
call_new(dst1_a, src, dstW, rgb2yuv);
if (memcmp(dst0_a, dst1_a, dstW * byte_size))
fail();
bench_new(dst1_a, src, dstW, rgb2yuv);
}
}
}
sws_freeContext(ctx);
}
void checkasm_check_sw_gbrp(void)
{
check_output_yuv2gbrp();
report("output_yuv2gbrp");
check_input_planar_rgb_to_y();
report("input_planar_rgb_y");
check_input_planar_rgb_to_uv();
report("input_planar_rgb_uv");
check_input_planar_rgb_to_a();
report("input_planar_rgb_a");
}

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