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avr32: remove explicit support

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The vendor has long since switched to Arm, with the last product
reaching their official end-of-life over 11 years ago. Linux support for
the ISA was dropped 7 years ago. More importantly, this architecture was
never supported by upstream GCC, and the vendor fork is stuck at version
4.2, which FFmpeg no longer supports (as per C11 requirement).

Presumably, this is still the case given the lack of vendor support.
Indeed all of the code being removed here consisted of inline assembler
scalar optimisations. A sane C compiler should be able to perform those
automatically nowadays (with the sole exception of fast CLZ detection),
but this is moot as this architecture is evidently dead.
release/7.1
Rémi Denis-Courmont 7 months ago
parent be2cabce32
commit 4819aeebf4
5 changed files with 2 additions and 313 deletions
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  1. 26
      configure
  2. 101
      libavcodec/avr32/mathops.h
  3. 2
      libavcodec/mathops.h
  4. 182
      libavutil/avr32/intreadwrite.h
  5. 4
      libavutil/intreadwrite.h

26
configure vendored
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@ -2129,9 +2129,6 @@ AUTODETECT_LIBS="
ARCH_LIST="
aarch64
arm
avr32
avr32_ap
avr32_uc
bfin
ia64
loongarch
@ -2815,7 +2812,7 @@ done
aligned_stack_if_any="aarch64 ppc x86"
fast_64bit_if_any="aarch64 ia64 mips64 parisc64 ppc64 riscv64 sparc64 x86_64"
fast_clz_if_any="aarch64 avr32 mips ppc x86"
fast_clz_if_any="aarch64 mips ppc x86"
fast_unaligned_if_any="aarch64 ppc x86"
simd_align_16_if_any="altivec neon sse"
simd_align_32_if_any="avx"
@ -5339,27 +5336,6 @@ elif enabled arm; then
test_cflags -mfp16-format=ieee && add_cflags -mfp16-format=ieee
elif enabled avr32; then
case $cpu in
ap7[02]0[0-2])
subarch="avr32_ap"
cpuflags="-mpart=$cpu"
;;
ap)
subarch="avr32_ap"
cpuflags="-march=$cpu"
;;
uc3[ab]*)
subarch="avr32_uc"
cpuflags="-mcpu=$cpu"
;;
uc)
subarch="avr32_uc"
cpuflags="-march=$cpu"
;;
esac
elif enabled bfin; then
cpuflags="-mcpu=$cpu"

101
libavcodec/avr32/mathops.h
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@ -1,101 +0,0 @@
/*
* Simple math operations
* Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
*
* This file is part of FFmpeg.
*
* FFmpeg is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef AVCODEC_AVR32_MATHOPS_H
#define AVCODEC_AVR32_MATHOPS_H
#include <stdint.h>
#include "config.h"
#include "libavutil/common.h"
#if HAVE_INLINE_ASM
#define MULL MULL
static inline av_const int MULL(int a, int b, unsigned shift)
{
union { int64_t x; int hl[2]; } x;
__asm__ ("muls.d %0, %1, %2 \n\t"
"lsr %0, %3 \n\t"
"or %0, %0, %m0<<%4 \n\t"
: "=r"(x) : "r"(b), "r"(a), "i"(shift), "i"(32-shift));
return x.hl[1];
}
#define MULH MULH
static inline av_const int MULH(int a, int b)
{
union { int64_t x; int hl[2]; } x;
__asm__ ("muls.d %0, %1, %2" : "=r"(x.x) : "r"(a), "r"(b));
return x.hl[0];
}
#define MUL64 MUL64
static inline av_const int64_t MUL64(int a, int b)
{
int64_t x;
__asm__ ("muls.d %0, %1, %2" : "=r"(x) : "r"(a), "r"(b));
return x;
}
static inline av_const int64_t MAC64(int64_t d, int a, int b)
{
__asm__ ("macs.d %0, %1, %2" : "+r"(d) : "r"(a), "r"(b));
return d;
}
#define MAC64(d, a, b) ((d) = MAC64(d, a, b))
#define MLS64(d, a, b) MAC64(d, -(a), b)
static inline av_const int MAC16(int d, int a, int b)
{
__asm__ ("machh.w %0, %1:b, %2:b" : "+r"(d) : "r"(a), "r"(b));
return d;
}
#define MAC16(d, a, b) ((d) = MAC16(d, a, b))
#define MLS16(d, a, b) MAC16(d, -(a), b)
#define MUL16 MUL16
static inline av_const int MUL16(int a, int b)
{
int d;
__asm__ ("mulhh.w %0, %1:b, %2:b" : "=r"(d) : "r"(a), "r"(b));
return d;
}
#define mid_pred mid_pred
static inline av_const int mid_pred(int a, int b, int c)
{
int m;
__asm__ ("mov %0, %2 \n\t"
"cp.w %1, %2 \n\t"
"movgt %0, %1 \n\t"
"movgt %1, %2 \n\t"
"cp.w %1, %3 \n\t"
"movle %1, %3 \n\t"
"cp.w %0, %1 \n\t"
"movgt %0, %1 \n\t"
: "=&r"(m), "+r"(a)
: "r"(b), "r"(c));
return m;
}
#endif /* HAVE_INLINE_ASM */
#endif /* AVCODEC_AVR32_MATHOPS_H */

2
libavcodec/mathops.h
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@ -39,8 +39,6 @@ extern const uint8_t ff_zigzag_scan[16+1];
#if ARCH_ARM
# include "arm/mathops.h"
#elif ARCH_AVR32
# include "avr32/mathops.h"
#elif ARCH_MIPS
# include "mips/mathops.h"
#elif ARCH_PPC

182
libavutil/avr32/intreadwrite.h
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@ -1,182 +0,0 @@
/*
* Copyright (c) 2009 Mans Rullgard <mans@mansr.com>
*
* This file is part of FFmpeg.
*
* FFmpeg is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
* License as published by the Free Software Foundation; either
* version 2.1 of the License, or (at your option) any later version.
*
* FFmpeg is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public
* License along with FFmpeg; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef AVUTIL_AVR32_INTREADWRITE_H
#define AVUTIL_AVR32_INTREADWRITE_H
#include <stdint.h>
#include "config.h"
#include "libavutil/bswap.h"
/*
* AVR32 does not support unaligned memory accesses, except for the AP
* series which supports unaligned 32-bit loads and stores. 16-bit
* and 64-bit accesses must be aligned to 16 and 32 bits, respectively.
* This means we cannot use the byte-swapping load/store instructions
* here.
*
* For 16-bit, 24-bit, and (on UC series) 32-bit loads, we instead use
* the LDINS.B instruction, which gcc fails to utilise with the
* generic code. GCC also fails to use plain LD.W and ST.W even for
* AP processors, so we override the generic code. The 64-bit
* versions are improved by using our optimised 32-bit functions.
*/
#define AV_RL16 AV_RL16
static av_always_inline uint16_t AV_RL16(const void *p)
{
uint16_t v;
__asm__ ("ld.ub %0, %1 \n\t"
"ldins.b %0:l, %2 \n\t"
: "=&r"(v)
: "m"(*(const uint8_t*)p), "RKs12"(*((const uint8_t*)p+1)));
return v;
}
#define AV_RB16 AV_RB16
static av_always_inline uint16_t AV_RB16(const void *p)
{
uint16_t v;
__asm__ ("ld.ub %0, %2 \n\t"
"ldins.b %0:l, %1 \n\t"
: "=&r"(v)
: "RKs12"(*(const uint8_t*)p), "m"(*((const uint8_t*)p+1)));
return v;
}
#define AV_RB24 AV_RB24
static av_always_inline uint32_t AV_RB24(const void *p)
{
uint32_t v;
__asm__ ("ld.ub %0, %3 \n\t"
"ldins.b %0:l, %2 \n\t"
"ldins.b %0:u, %1 \n\t"
: "=&r"(v)
: "RKs12"(* (const uint8_t*)p),
"RKs12"(*((const uint8_t*)p+1)),
"m" (*((const uint8_t*)p+2)));
return v;
}
#define AV_RL24 AV_RL24
static av_always_inline uint32_t AV_RL24(const void *p)
{
uint32_t v;
__asm__ ("ld.ub %0, %1 \n\t"
"ldins.b %0:l, %2 \n\t"
"ldins.b %0:u, %3 \n\t"
: "=&r"(v)
: "m" (* (const uint8_t*)p),
"RKs12"(*((const uint8_t*)p+1)),
"RKs12"(*((const uint8_t*)p+2)));
return v;
}
#if ARCH_AVR32_AP
#define AV_RB32 AV_RB32
static av_always_inline uint32_t AV_RB32(const void *p)
{
uint32_t v;
__asm__ ("ld.w %0, %1" : "=r"(v) : "m"(*(const uint32_t*)p));
return v;
}
#define AV_WB32 AV_WB32
static av_always_inline void AV_WB32(void *p, uint32_t v)
{
__asm__ ("st.w %0, %1" : "=m"(*(uint32_t*)p) : "r"(v));
}
/* These two would be defined by generic code, but we need them sooner. */
#define AV_RL32(p) av_bswap32(AV_RB32(p))
#define AV_WL32(p, v) AV_WB32(p, av_bswap32(v))
#define AV_WB64 AV_WB64
static av_always_inline void AV_WB64(void *p, uint64_t v)
{
union { uint64_t v; uint32_t hl[2]; } vv = { v };
AV_WB32(p, vv.hl[0]);
AV_WB32((uint32_t*)p+1, vv.hl[1]);
}
#define AV_WL64 AV_WL64
static av_always_inline void AV_WL64(void *p, uint64_t v)
{
union { uint64_t v; uint32_t hl[2]; } vv = { v };
AV_WL32(p, vv.hl[1]);
AV_WL32((uint32_t*)p+1, vv.hl[0]);
}
#else /* ARCH_AVR32_AP */
#define AV_RB32 AV_RB32
static av_always_inline uint32_t AV_RB32(const void *p)
{
uint32_t v;
__asm__ ("ld.ub %0, %4 \n\t"
"ldins.b %0:l, %3 \n\t"
"ldins.b %0:u, %2 \n\t"
"ldins.b %0:t, %1 \n\t"
: "=&r"(v)
: "RKs12"(* (const uint8_t*)p),
"RKs12"(*((const uint8_t*)p+1)),
"RKs12"(*((const uint8_t*)p+2)),
"m" (*((const uint8_t*)p+3)));
return v;
}
#define AV_RL32 AV_RL32
static av_always_inline uint32_t AV_RL32(const void *p)
{
uint32_t v;
__asm__ ("ld.ub %0, %1 \n\t"
"ldins.b %0:l, %2 \n\t"
"ldins.b %0:u, %3 \n\t"
"ldins.b %0:t, %4 \n\t"
: "=&r"(v)
: "m" (* (const uint8_t*)p),
"RKs12"(*((const uint8_t*)p+1)),
"RKs12"(*((const uint8_t*)p+2)),
"RKs12"(*((const uint8_t*)p+3)));
return v;
}
#endif /* ARCH_AVR32_AP */
#define AV_RB64 AV_RB64
static av_always_inline uint64_t AV_RB64(const void *p)
{
union { uint64_t v; uint32_t hl[2]; } v;
v.hl[0] = AV_RB32(p);
v.hl[1] = AV_RB32((const uint32_t*)p+1);
return v.v;
}
#define AV_RL64 AV_RL64
static av_always_inline uint64_t AV_RL64(const void *p)
{
union { uint64_t v; uint32_t hl[2]; } v;
v.hl[1] = AV_RL32(p);
v.hl[0] = AV_RL32((const uint32_t*)p+1);
return v.v;
}
#endif /* AVUTIL_AVR32_INTREADWRITE_H */

4
libavutil/intreadwrite.h
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@ -64,9 +64,7 @@ typedef union {
#include "config.h"
#if ARCH_AVR32
# include "avr32/intreadwrite.h"
#elif ARCH_MIPS
#if ARCH_MIPS
# include "mips/intreadwrite.h"
#elif ARCH_PPC
# include "ppc/intreadwrite.h"

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