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@ -43,19 +43,6 @@ static inline av_const int MULH(int a, int b) |
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return c; |
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} |
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#define UMULH UMULH |
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static inline av_const unsigned UMULH(unsigned a, unsigned b) |
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{ |
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unsigned c; |
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__asm__ ("dmultu %1, %2 \n\t" |
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"mflo %0 \n\t" |
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"dsrl %0, %0, 32 \n\t" |
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: "=r"(c) |
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: "r"(a),"r"(b) |
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: "hi", "lo"); |
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return c; |
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} |
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#define mid_pred mid_pred |
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static inline av_const int mid_pred(int a, int b, int c) |
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{ |
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@ -73,44 +60,6 @@ static inline av_const int mid_pred(int a, int b, int c) |
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return t; |
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} |
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#define ff_sqrt ff_sqrt |
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static inline av_const unsigned int ff_sqrt(unsigned int a) |
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{ |
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unsigned int b; |
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__asm__ ("ctc1 %1, $f0 \n\t" |
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"sqrt.s $f2, $f0 \n\t" |
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"cvt.w.s $f0, $f2 \n\t" |
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"cfc1 %0, $f0 \n\t" |
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: "=r"(b) |
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: "r"(a)); |
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return b; |
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} |
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static inline av_const int64_t MAC64(int64_t d, int a, int b) |
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{ |
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int64_t m; |
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__asm__ ("dmult %2, %3 \n\t" |
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"mflo %1 \n\t" |
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"daddu %0, %0, %1 \n\t" |
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: "+r"(d), "=&r"(m) : "r"(a), "r"(b) |
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: "hi", "lo"); |
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return d; |
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} |
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#define MAC64(d, a, b) ((d) = MAC64(d, a, b)) |
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static inline av_const int64_t MLS64(int64_t d, int a, int b) |
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{ |
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int64_t m; |
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__asm__ ("dmult %2, %3 \n\t" |
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"mflo %1 \n\t" |
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"dsubu %0, %0, %1 \n\t" |
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: "+r"(d), "=&r"(m) : "r"(a), "r"(b) |
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: "hi", "lo"); |
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return d; |
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} |
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#define MLS64(d, a, b) ((d) = MLS64(d, a, b)) |
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#endif /* HAVE_LOONGSON3 */ |
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#endif /* HAVE_INLINE_ASM */ |
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