From 1b3a7e1f42c3d89253e9837ada98e6bfb0cbab2f Mon Sep 17 00:00:00 2001 From: "Ronald S. Bultje" Date: Thu, 24 Oct 2013 06:54:32 -0400 Subject: [PATCH] avcodec/x86/videodsp: Properly mark sse2 instructions in emulated_edge_mc x86 simd as such. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Should fix crashes or corrupt output on pre-SSE2 CPUs when they were using SSE2-code (e.g. AMD Athlon XP 2400+ or Intel Pentium III) in hfix or hvar single-edge (left/right) extension functions. Tested-by: Ingo Brückl Signed-off-by: Michael Niedermayer --- libavcodec/x86/videodsp.asm | 12 +++++----- libavcodec/x86/videodsp_init.c | 42 +++++++++++++++++++++------------- 2 files changed, 32 insertions(+), 22 deletions(-) diff --git a/libavcodec/x86/videodsp.asm b/libavcodec/x86/videodsp.asm index aa865f5a2b..6d5b57e086 100644 --- a/libavcodec/x86/videodsp.asm +++ b/libavcodec/x86/videodsp.asm @@ -100,10 +100,10 @@ cglobal emu_edge_hvar, 5, 6, 1, dst, dst_stride, start_x, n_words, h, w ; FIXME also write a ssse3 version using pshufb movzx wd, byte [dstq+start_xq] ; w = read(1) imul wd, 0x01010101 ; w *= 0x01010101 - movd m0, wd ; FIXME this is sse2, not sse + movd m0, wd mov wq, n_wordsq ; initialize w -%if cpuflag(sse) - shufps m0, m0, q0000 ; splat +%if cpuflag(sse2) + pshufd m0, m0, q0000 ; splat %else ; mmx punpckldq m0, m0 ; splat %endif ; mmx/sse @@ -124,7 +124,7 @@ INIT_MMX mmx hvar_fn %endif -INIT_XMM sse +INIT_XMM sse2 hvar_fn ; macro to read/write a horizontal number of pixels (%2) to/from registers @@ -353,7 +353,7 @@ VERTICAL_EXTEND 16, 22 %if %1 >= 8 movd m0, vald %if mmsize == 16 - shufps m0, m0, q0000 + pshufd m0, m0, q0000 %else punpckldq m0, m0 %endif @@ -423,7 +423,7 @@ H_EXTEND 2, 14 H_EXTEND 16, 22 %endif -INIT_XMM sse +INIT_XMM sse2 H_EXTEND 16, 22 %macro PREFETCH_FN 1 diff --git a/libavcodec/x86/videodsp_init.c b/libavcodec/x86/videodsp_init.c index b5bab7257d..0e6e0ddf1f 100644 --- a/libavcodec/x86/videodsp_init.c +++ b/libavcodec/x86/videodsp_init.c @@ -117,17 +117,17 @@ static emu_edge_hfix_func *hfixtbl_mmx[11] = { }; #endif extern emu_edge_hvar_func ff_emu_edge_hvar_mmx; -extern emu_edge_hfix_func ff_emu_edge_hfix16_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix18_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix20_sse; -extern emu_edge_hfix_func ff_emu_edge_hfix22_sse; -static emu_edge_hfix_func *hfixtbl_sse[11] = { +extern emu_edge_hfix_func ff_emu_edge_hfix16_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix18_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix20_sse2; +extern emu_edge_hfix_func ff_emu_edge_hfix22_sse2; +static emu_edge_hfix_func *hfixtbl_sse2[11] = { ff_emu_edge_hfix2_mmx, ff_emu_edge_hfix4_mmx, ff_emu_edge_hfix6_mmx, ff_emu_edge_hfix8_mmx, ff_emu_edge_hfix10_mmx, ff_emu_edge_hfix12_mmx, - ff_emu_edge_hfix14_mmx, ff_emu_edge_hfix16_sse, ff_emu_edge_hfix18_sse, - ff_emu_edge_hfix20_sse, ff_emu_edge_hfix22_sse + ff_emu_edge_hfix14_mmx, ff_emu_edge_hfix16_sse2, ff_emu_edge_hfix18_sse2, + ff_emu_edge_hfix20_sse2, ff_emu_edge_hfix22_sse2 }; -extern emu_edge_hvar_func ff_emu_edge_hvar_sse; +extern emu_edge_hvar_func ff_emu_edge_hvar_sse2; static av_always_inline void emulated_edge_mc(uint8_t *dst, ptrdiff_t dst_stride, const uint8_t *src, ptrdiff_t src_stride, @@ -212,21 +212,26 @@ static av_noinline void emulated_edge_mc_mmx(uint8_t *buf, ptrdiff_t buf_stride, src_x, src_y, w, h, vfixtbl_mmx, &ff_emu_edge_vvar_mmx, hfixtbl_mmx, &ff_emu_edge_hvar_mmx); } -#endif static av_noinline void emulated_edge_mc_sse(uint8_t *buf, ptrdiff_t buf_stride, const uint8_t *src, ptrdiff_t src_stride, int block_w, int block_h, int src_x, int src_y, int w, int h) { - emulated_edge_mc(buf, buf_stride, src, src_stride, block_w, block_h, src_x, - src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse, hfixtbl_sse, -#if ARCH_X86_64 - &ff_emu_edge_hvar_sse -#else - &ff_emu_edge_hvar_mmx + emulated_edge_mc(buf, buf_stride, src, src_stride, block_w, block_h, + src_x, src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse, + hfixtbl_mmx, &ff_emu_edge_hvar_mmx); +} #endif - ); + +static av_noinline void emulated_edge_mc_sse2(uint8_t *buf, ptrdiff_t buf_stride, + const uint8_t *src, ptrdiff_t src_stride, + int block_w, int block_h, + int src_x, int src_y, int w, int h) +{ + emulated_edge_mc(buf, buf_stride, src, src_stride, block_w, block_h, src_x, + src_y, w, h, vfixtbl_sse, &ff_emu_edge_vvar_sse, + hfixtbl_sse2, &ff_emu_edge_hvar_sse2); } #endif /* HAVE_YASM */ @@ -249,8 +254,13 @@ av_cold void ff_videodsp_init_x86(VideoDSPContext *ctx, int bpc) if (EXTERNAL_MMXEXT(cpu_flags)) { ctx->prefetch = ff_prefetch_mmxext; } +#if ARCH_X86_32 if (EXTERNAL_SSE(cpu_flags) && bpc <= 8) { ctx->emulated_edge_mc = emulated_edge_mc_sse; } +#endif /* ARCH_X86_32 */ + if (EXTERNAL_SSE2(cpu_flags) && bpc <= 8) { + ctx->emulated_edge_mc = emulated_edge_mc_sse2; + } #endif /* HAVE_YASM */ }