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336 lines
9.7 KiB
336 lines
9.7 KiB
15 years ago
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/*
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* FFT transform with Altivec optimizations
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* Copyright (c) 2009 Loren Merritt
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/*
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* These functions are not individually interchangeable with the C versions.
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* While C takes arrays of FFTComplex, Altivec leaves intermediate results
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* in blocks as convenient to the vector size.
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* i.e. {4x real, 4x imaginary, 4x real, ...}
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*
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* I ignore standard calling convention.
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* Instead, the following registers are treated as global constants:
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* v14: zero
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* v15..v18: cosines
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* v19..v29: permutations
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* r9: 16
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* r12: ff_cos_tabs
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* and the rest are free for local use.
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*/
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#include "config.h"
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#include "asm.S"
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.text
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/* Apple gas doesn't support this shorthand */
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.macro mtctr rx
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mtspr 9, \rx
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.endm
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.macro addi2 ra, imm // add 32-bit immediate
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.if \imm & 0xffff
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addi \ra, \ra, \imm@l
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.endif
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.if (\imm+0x8000)>>16
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addis \ra, \ra, \imm@ha
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.endif
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.endm
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#if ARCH_PPC64
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#define PTR .quad
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.macro LOAD_PTR ra, rbase, offset
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ld \ra,(\offset)*8(\rbase)
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.endm
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.macro STORE_PTR ra, rbase, offset
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std \ra,(\offset)*8(\rbase)
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.endm
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#else
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#define PTR .int
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.macro LOAD_PTR ra, rbase, offset
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lwz \ra,(\offset)*4(\rbase)
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.endm
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.macro STORE_PTR ra, rbase, offset
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stw \ra,(\offset)*4(\rbase)
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.endm
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#endif
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.macro FFT4 a0, a1, a2, a3 // in:0-1 out:2-3
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vperm \a2,\a0,\a1,v20 // vcprm(0,1,s2,s1) // {r0,i0,r3,i2}
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vperm \a3,\a0,\a1,v21 // vcprm(2,3,s0,s3) // {r1,i1,r2,i3}
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vaddfp \a0,\a2,\a3 // {t1,t2,t6,t5}
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vsubfp \a1,\a2,\a3 // {t3,t4,t8,t7}
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vmrghw \a2,\a0,\a1 // vcprm(0,s0,1,s1) // {t1,t3,t2,t4}
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vperm \a3,\a0,\a1,v22 // vcprm(2,s3,3,s2) // {t6,t7,t5,t8}
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vaddfp \a0,\a2,\a3 // {r0,r1,i0,i1}
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vsubfp \a1,\a2,\a3 // {r2,r3,i2,i3}
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vperm \a2,\a0,\a1,v23 // vcprm(0,1,s0,s1) // {r0,r1,r2,r3}
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vperm \a3,\a0,\a1,v24 // vcprm(2,3,s2,s3) // {i0,i1,i2,i3}
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.endm
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.macro FFT4x2 a0, a1, b0, b1, a2, a3, b2, b3
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vperm \a2,\a0,\a1,v20 // vcprm(0,1,s2,s1) // {r0,i0,r3,i2}
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vperm \a3,\a0,\a1,v21 // vcprm(2,3,s0,s3) // {r1,i1,r2,i3}
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vperm \b2,\b0,\b1,v20
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vperm \b3,\b0,\b1,v21
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vaddfp \a0,\a2,\a3 // {t1,t2,t6,t5}
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vsubfp \a1,\a2,\a3 // {t3,t4,t8,t7}
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vaddfp \b0,\b2,\b3
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vsubfp \b1,\b2,\b3
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vmrghw \a2,\a0,\a1 // vcprm(0,s0,1,s1) // {t1,t3,t2,t4}
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vperm \a3,\a0,\a1,v22 // vcprm(2,s3,3,s2) // {t6,t7,t5,t8}
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vmrghw \b2,\b0,\b1
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vperm \b3,\b0,\b1,v22
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vaddfp \a0,\a2,\a3 // {r0,r1,i0,i1}
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vsubfp \a1,\a2,\a3 // {r2,r3,i2,i3}
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vaddfp \b0,\b2,\b3
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vsubfp \b1,\b2,\b3
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vperm \a2,\a0,\a1,v23 // vcprm(0,1,s0,s1) // {r0,r1,r2,r3}
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vperm \a3,\a0,\a1,v24 // vcprm(2,3,s2,s3) // {i0,i1,i2,i3}
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vperm \b2,\b0,\b1,v23
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vperm \b3,\b0,\b1,v24
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.endm
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.macro FFT8 a0, a1, b0, b1, a2, a3, b2, b3, b4 // in,out:a0-b1
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vmrghw \b2,\b0,\b1 // vcprm(0,s0,1,s1) // {r4,r6,i4,i6}
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vmrglw \b3,\b0,\b1 // vcprm(2,s2,3,s3) // {r5,r7,i5,i7}
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vperm \a2,\a0,\a1,v20 // FFT4 ...
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vperm \a3,\a0,\a1,v21
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vaddfp \b0,\b2,\b3 // {t1,t3,t2,t4}
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vsubfp \b1,\b2,\b3 // {r5,r7,i5,i7}
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vperm \b4,\b1,\b1,v25 // vcprm(2,3,0,1) // {i5,i7,r5,r7}
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vaddfp \a0,\a2,\a3
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vsubfp \a1,\a2,\a3
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vmaddfp \b1,\b1,v17,v14 // * {-1,1,1,-1}/sqrt(2)
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vmaddfp \b1,\b4,v18,\b1 // * { 1,1,1,1 }/sqrt(2) // {t8,ta,t7,t9}
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vmrghw \a2,\a0,\a1
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vperm \a3,\a0,\a1,v22
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vperm \b2,\b0,\b1,v26 // vcprm(1,2,s3,s0) // {t3,t2,t9,t8}
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vperm \b3,\b0,\b1,v27 // vcprm(0,3,s2,s1) // {t1,t4,t7,ta}
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vaddfp \a0,\a2,\a3
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vsubfp \a1,\a2,\a3
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vaddfp \b0,\b2,\b3 // {t1,t2,t9,ta}
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vsubfp \b1,\b2,\b3 // {t6,t5,tc,tb}
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vperm \a2,\a0,\a1,v23
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vperm \a3,\a0,\a1,v24
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vperm \b2,\b0,\b1,v28 // vcprm(0,2,s1,s3) // {t1,t9,t5,tb}
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vperm \b3,\b0,\b1,v29 // vcprm(1,3,s0,s2) // {t2,ta,t6,tc}
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vsubfp \b0,\a2,\b2 // {r4,r5,r6,r7}
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vsubfp \b1,\a3,\b3 // {i4,i5,i6,i7}
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vaddfp \a0,\a2,\b2 // {r0,r1,r2,r3}
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vaddfp \a1,\a3,\b3 // {i0,i1,i2,i3}
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.endm
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.macro BF d0,d1,s0,s1
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vsubfp \d1,\s0,\s1
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vaddfp \d0,\s0,\s1
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.endm
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fft4_altivec:
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lvx v0, 0,r3
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lvx v1,r9,r3
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FFT4 v0,v1,v2,v3
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stvx v2, 0,r3
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stvx v3,r9,r3
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blr
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fft8_altivec:
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addi r4,r3,32
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lvx v0, 0,r3
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lvx v1,r9,r3
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lvx v2, 0,r4
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lvx v3,r9,r4
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FFT8 v0,v1,v2,v3,v4,v5,v6,v7,v8
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stvx v0, 0,r3
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stvx v1,r9,r3
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stvx v2, 0,r4
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stvx v3,r9,r4
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blr
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fft16_altivec:
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addi r5,r3,64
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addi r6,r3,96
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addi r4,r3,32
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lvx v0, 0,r5
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lvx v1,r9,r5
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lvx v2, 0,r6
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lvx v3,r9,r6
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FFT4x2 v0,v1,v2,v3,v4,v5,v6,v7
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lvx v0, 0,r3
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lvx v1,r9,r3
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lvx v2, 0,r4
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lvx v3,r9,r4
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FFT8 v0,v1,v2,v3,v8,v9,v10,v11,v12
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vmaddfp v8,v4,v15,v14 // r2*wre
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vmaddfp v9,v5,v15,v14 // i2*wre
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vmaddfp v10,v6,v15,v14 // r3*wre
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vmaddfp v11,v7,v15,v14 // i3*wre
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vmaddfp v8,v5,v16,v8 // i2*wim
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vnmsubfp v9,v4,v16,v9 // r2*wim
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vnmsubfp v10,v7,v16,v10 // i3*wim
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vmaddfp v11,v6,v16,v11 // r3*wim
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BF v10,v12,v10,v8
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BF v11,v13,v9,v11
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BF v0,v4,v0,v10
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BF v3,v7,v3,v12
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stvx v0, 0,r3
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stvx v4, 0,r5
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stvx v3,r9,r4
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stvx v7,r9,r6
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BF v1,v5,v1,v11
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BF v2,v6,v2,v13
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stvx v1,r9,r3
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stvx v5,r9,r5
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stvx v2, 0,r4
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stvx v6, 0,r6
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blr
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// void pass(float *z, float *wre, int n)
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.macro PASS interleave, suffix
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fft_pass\suffix\()_altivec:
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mtctr r5
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slwi r0,r5,4
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slwi r7,r5,6 // o2
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slwi r5,r5,5 // o1
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add r10,r5,r7 // o3
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add r0,r4,r0 // wim
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addi r6,r5,16 // o1+16
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addi r8,r7,16 // o2+16
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addi r11,r10,16 // o3+16
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1:
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lvx v8, 0,r4 // wre
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lvx v10, 0,r0 // wim
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sub r0,r0,r9
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lvx v9, 0,r0
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vperm v9,v9,v10,v19 // vcprm(s0,3,2,1) => wim[0 .. -3]
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lvx v4,r3,r7 // r2 = z[o2]
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lvx v5,r3,r8 // i2 = z[o2+16]
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lvx v6,r3,r10 // r3 = z[o3]
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lvx v7,r3,r11 // i3 = z[o3+16]
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vmaddfp v10,v4,v8,v14 // r2*wre
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vmaddfp v11,v5,v8,v14 // i2*wre
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vmaddfp v12,v6,v8,v14 // r3*wre
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vmaddfp v13,v7,v8,v14 // i3*wre
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lvx v0, 0,r3 // r0 = z[0]
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lvx v3,r3,r6 // i1 = z[o1+16]
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vmaddfp v10,v5,v9,v10 // i2*wim
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vnmsubfp v11,v4,v9,v11 // r2*wim
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vnmsubfp v12,v7,v9,v12 // i3*wim
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vmaddfp v13,v6,v9,v13 // r3*wim
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lvx v1,r3,r9 // i0 = z[16]
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lvx v2,r3,r5 // r1 = z[o1]
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BF v12,v8,v12,v10
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BF v13,v9,v11,v13
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BF v0,v4,v0,v12
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BF v3,v7,v3,v8
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.if !\interleave
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stvx v0, 0,r3
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stvx v4,r3,r7
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stvx v3,r3,r6
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stvx v7,r3,r11
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.endif
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BF v1,v5,v1,v13
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BF v2,v6,v2,v9
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.if !\interleave
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stvx v1,r3,r9
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stvx v2,r3,r5
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stvx v5,r3,r8
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stvx v6,r3,r10
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.else
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vmrghw v8,v0,v1
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vmrglw v9,v0,v1
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stvx v8, 0,r3
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stvx v9,r3,r9
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vmrghw v8,v2,v3
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vmrglw v9,v2,v3
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stvx v8,r3,r5
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stvx v9,r3,r6
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vmrghw v8,v4,v5
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vmrglw v9,v4,v5
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stvx v8,r3,r7
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stvx v9,r3,r8
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vmrghw v8,v6,v7
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vmrglw v9,v6,v7
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stvx v8,r3,r10
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stvx v9,r3,r11
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.endif
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addi r3,r3,32
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addi r4,r4,16
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bdnz 1b
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sub r3,r3,r5
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blr
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.endm
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.macro DECL_FFT suffix, bits, n, n2, n4
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fft\n\suffix\()_altivec:
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mflr r0
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STORE_PTR r0,r1,\bits-5
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bl fft\n2\()_altivec
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addi2 r3,\n*4
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bl fft\n4\()_altivec
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addi2 r3,\n*2
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bl fft\n4\()_altivec
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addi2 r3,\n*-6
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LOAD_PTR r0,r1,\bits-5
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LOAD_PTR r4,r12,\bits
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mtlr r0
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li r5,\n/16
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b fft_pass\suffix\()_altivec
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.endm
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.macro DECL_FFTS interleave, suffix
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.text
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PASS \interleave, \suffix
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DECL_FFT \suffix, 5, 32, 16, 8
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DECL_FFT \suffix, 6, 64, 32, 16
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DECL_FFT \suffix, 7, 128, 64, 32
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DECL_FFT \suffix, 8, 256, 128, 64
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DECL_FFT \suffix, 9, 512, 256, 128
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DECL_FFT \suffix,10, 1024, 512, 256
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DECL_FFT \suffix,11, 2048, 1024, 512
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DECL_FFT \suffix,12, 4096, 2048, 1024
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DECL_FFT \suffix,13, 8192, 4096, 2048
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DECL_FFT \suffix,14,16384, 8192, 4096
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DECL_FFT \suffix,15,32768,16384, 8192
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DECL_FFT \suffix,16,65536,32768,16384
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.rodata
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.global EXTERN_ASM\()ff_fft_dispatch\suffix\()_altivec
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EXTERN_ASM\()ff_fft_dispatch\suffix\()_altivec:
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PTR fft4_altivec
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PTR fft8_altivec
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PTR fft16_altivec
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PTR fft32\suffix\()_altivec
|
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PTR fft64\suffix\()_altivec
|
||
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PTR fft128\suffix\()_altivec
|
||
|
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PTR fft256\suffix\()_altivec
|
||
|
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PTR fft512\suffix\()_altivec
|
||
|
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PTR fft1024\suffix\()_altivec
|
||
|
|
PTR fft2048\suffix\()_altivec
|
||
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PTR fft4096\suffix\()_altivec
|
||
|
|
PTR fft8192\suffix\()_altivec
|
||
|
|
PTR fft16384\suffix\()_altivec
|
||
|
|
PTR fft32768\suffix\()_altivec
|
||
|
|
PTR fft65536\suffix\()_altivec
|
||
|
|
.endm
|
||
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|
|
||
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DECL_FFTS 0
|
||
|
|
DECL_FFTS 1, _interleave
|