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FFmpeg/libavutil/x86/pixelutils.asm

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avutil: add pixelutils API
10 years ago
;******************************************************************************
;* Pixel utilities SIMD
;*
;* Copyright (C) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
;* Copyright (C) 2014 Clément Bœsch <u pkh me>
;*
;* This file is part of FFmpeg.
;*
;* FFmpeg is free software; you can redistribute it and/or
;* modify it under the terms of the GNU Lesser General Public
;* License as published by the Free Software Foundation; either
;* version 2.1 of the License, or (at your option) any later version.
;*
;* FFmpeg is distributed in the hope that it will be useful,
;* but WITHOUT ANY WARRANTY; without even the implied warranty of
;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
;* Lesser General Public License for more details.
;*
;* You should have received a copy of the GNU Lesser General Public
;* License along with FFmpeg; if not, write to the Free Software
;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
;******************************************************************************
libavutil: include assembly with full path from source root Otherwise nasm writes the full host-specific paths into .o output, which breaks binary reproducibility. Signed-off-by: Alexander Kanavin <alex.kanavin@gmail.com> Signed-off-by: Anton Khirnov <anton@khirnov.net>
3 years ago
%include "libavutil/x86/x86util.asm"
avutil: add pixelutils API
10 years ago
x86inc: Drop SECTION_TEXT macro The .text section is already 16-byte aligned by default on all supported platforms so `SECTION_TEXT` isn't any different from `SECTION .text`.
10 years ago
SECTION .text
avutil: add pixelutils API
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;-------------------------------------------------------------------------------
; int ff_pixelutils_sad_8x8_mmxext(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
;-------------------------------------------------------------------------------
INIT_MMX mmxext
cglobal pixelutils_sad_8x8, 4,4,0, src1, stride1, src2, stride2
pxor m2, m2
%rep 4
mova m0, [src1q]
mova m1, [src1q + stride1q]
psadbw m0, [src2q]
psadbw m1, [src2q + stride2q]
paddw m2, m0
paddw m2, m1
lea src1q, [src1q + 2*stride1q]
lea src2q, [src2q + 2*stride2q]
%endrep
movd eax, m2
RET
;-------------------------------------------------------------------------------
avutil/pixelutils: correct the function name in comments Signed-off-by: Jun Zhao <mypopydev@gmail.com>
6 years ago
; int ff_pixelutils_sad_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
avutil: add pixelutils API
10 years ago
;-------------------------------------------------------------------------------
INIT_XMM sse2
cglobal pixelutils_sad_16x16, 4,4,5, src1, stride1, src2, stride2
avutil/pixelutils: faster pixelutils_sad_16x16 501 to 439 decicycles. See 45c7f3997ea11c3d1007b2126b1c0049a8c27105.
10 years ago
movu m4, [src1q]
movu m2, [src2q]
avutil: add pixelutils API
10 years ago
movu m1, [src1q + stride1q]
avutil/pixelutils: faster pixelutils_sad_16x16 501 to 439 decicycles. See 45c7f3997ea11c3d1007b2126b1c0049a8c27105.
10 years ago
movu m3, [src2q + stride2q]
psadbw m4, m2
psadbw m1, m3
paddw m4, m1
%rep 7
lea src1q, [src1q + 2*stride1q]
lea src2q, [src2q + 2*stride2q]
movu m0, [src1q]
avutil: add pixelutils API
10 years ago
movu m2, [src2q]
avutil/pixelutils: faster pixelutils_sad_16x16 501 to 439 decicycles. See 45c7f3997ea11c3d1007b2126b1c0049a8c27105.
10 years ago
movu m1, [src1q + stride1q]
avutil: add pixelutils API
10 years ago
movu m3, [src2q + stride2q]
psadbw m0, m2
psadbw m1, m3
paddw m4, m0
paddw m4, m1
%endrep
movhlps m0, m4
paddw m4, m0
movd eax, m4
RET
;-------------------------------------------------------------------------------
avutil/pixelutils: correct the function name in comments Signed-off-by: Jun Zhao <mypopydev@gmail.com>
6 years ago
; int ff_pixelutils_sad_[au]_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
avutil: add pixelutils API
10 years ago
;-------------------------------------------------------------------------------
%macro SAD_XMM_16x16 1
INIT_XMM sse2
cglobal pixelutils_sad_%1_16x16, 4,4,3, src1, stride1, src2, stride2
avutil/pixelutils: faster pixelutils_sad_[au]_16x16 ~560 → ~500 decicycles This is following the comments from Michael in https://ffmpeg.org/pipermail/ffmpeg-devel/2014-August/160599.html Using 2 registers for accumulator didn't help. On the other hand, some re-ordering between the movs and psadbw allowed going ~538 to ~500.
10 years ago
mov%1 m2, [src2q]
psadbw m2, [src1q]
avutil: add pixelutils API
10 years ago
mov%1 m1, [src2q + stride2q]
psadbw m1, [src1q + stride1q]
paddw m2, m1
avutil/pixelutils: faster pixelutils_sad_[au]_16x16 ~560 → ~500 decicycles This is following the comments from Michael in https://ffmpeg.org/pipermail/ffmpeg-devel/2014-August/160599.html Using 2 registers for accumulator didn't help. On the other hand, some re-ordering between the movs and psadbw allowed going ~538 to ~500.
10 years ago
%rep 7
avutil: add pixelutils API
10 years ago
lea src1q, [src1q + 2*stride1q]
lea src2q, [src2q + 2*stride2q]
avutil/pixelutils: faster pixelutils_sad_[au]_16x16 ~560 → ~500 decicycles This is following the comments from Michael in https://ffmpeg.org/pipermail/ffmpeg-devel/2014-August/160599.html Using 2 registers for accumulator didn't help. On the other hand, some re-ordering between the movs and psadbw allowed going ~538 to ~500.
10 years ago
mov%1 m0, [src2q]
psadbw m0, [src1q]
mov%1 m1, [src2q + stride2q]
psadbw m1, [src1q + stride1q]
paddw m2, m0
paddw m2, m1
avutil: add pixelutils API
10 years ago
%endrep
movhlps m0, m2
paddw m2, m0
movd eax, m2
RET
%endmacro
SAD_XMM_16x16 a
SAD_XMM_16x16 u
avutil/pixelutils: sad_32x32 sse2/avx2 optimizations. add ff_pixelutils_sad_32x32_sse2, ff_pixelutils_sad_{a,u}_32x32_sse2, ff_pixelutils_sad_32x32_avx22, ff_pixelutils_sad_{a,u}_32x32_avx2 use perf record/report profiling, get instructions:u for avx2 sad_32x32: 72.05% pixelutils pixelutils [.] block_sad_32x32_c 18.50% pixelutils pixelutils [.] block_sad_16x16_c 4.78% pixelutils pixelutils [.] block_sad_8x8_c 2.69% pixelutils pixelutils [.] block_sad_4x4_c 0.89% pixelutils pixelutils [.] block_sad_2x2_c 0.16% pixelutils pixelutils [.] ff_pixelutils_sad_32x32_avx2 0.16% pixelutils pixelutils [.] ff_pixelutils_sad_u_32x32_avx2 0.12% pixelutils pixelutils [.] ff_pixelutils_sad_a_32x32_avx2 sse2 sad_32x32 instructions:u like: 71.86% pixelutils pixelutils [.] block_sad_32x32_c 18.42% pixelutils pixelutils [.] block_sad_16x16_c 4.81% pixelutils pixelutils [.] block_sad_8x8_c 2.68% pixelutils pixelutils [.] block_sad_4x4_c 0.88% pixelutils pixelutils [.] block_sad_2x2_c 0.29% pixelutils pixelutils [.] ff_pixelutils_sad_32x32_sse2 0.26% pixelutils pixelutils [.] ff_pixelutils_sad_u_32x32_sse2 0.23% pixelutils pixelutils [.] ff_pixelutils_sad_a_32x32_sse2 Signed-off-by: Jun Zhao <mypopydev@gmail.com>
6 years ago
%macro PROCESS_SAD_32x4_U 0
movu m1, [r2]
movu m2, [r2 + 16]
movu m3, [r0]
movu m4, [r0 + 16]
psadbw m1, m3
psadbw m2, m4
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
movu m1, [r2]
movu m2, [r2 + 16]
movu m3, [r0]
movu m4, [r0 + 16]
psadbw m1, m3
psadbw m2, m4
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
movu m1, [r2]
movu m2, [r2 + 16]
movu m3, [r0]
movu m4, [r0 + 16]
psadbw m1, m3
psadbw m2, m4
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
movu m1, [r2]
movu m2, [r2 + 16]
movu m3, [r0]
movu m4, [r0 + 16]
psadbw m1, m3
psadbw m2, m4
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
%endmacro
%macro PROCESS_SAD_32x4 1
mov%1 m1, [r2]
mov%1 m2, [r2 + 16]
psadbw m1, [r0]
psadbw m2, [r0 + 16]
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
mov%1 m1, [r2]
mov%1 m2, [r2 + 16]
psadbw m1, [r0]
psadbw m2, [r0 + 16]
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
mov%1 m1, [r2]
mov%1 m2, [r2 + 16]
psadbw m1, [r0]
psadbw m2, [r0 + 16]
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
mov%1 m1, [r2]
mov%1 m2, [r2 + 16]
psadbw m1, [r0]
psadbw m2, [r0 + 16]
paddd m1, m2
paddd m0, m1
lea r2, [r2 + r3]
lea r0, [r0 + r1]
%endmacro
;-----------------------------------------------------------------------------
; int ff_pixelutils_sad_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
;-----------------------------------------------------------------------------
INIT_XMM sse2
cglobal pixelutils_sad_32x32, 4,5,5, src1, stride1, src2, stride2
pxor m0, m0
mov r4d, 4
.loop:
PROCESS_SAD_32x4_U
PROCESS_SAD_32x4_U
dec r4d
jnz .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
;-------------------------------------------------------------------------------
; int ff_pixelutils_sad_[au]_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
;-------------------------------------------------------------------------------
%macro SAD_XMM_32x32 1
INIT_XMM sse2
cglobal pixelutils_sad_%1_32x32, 4,5,3, src1, stride1, src2, stride2
pxor m0, m0
mov r4d, 4
.loop:
PROCESS_SAD_32x4 %1
PROCESS_SAD_32x4 %1
dec r4d
jnz .loop
movhlps m1, m0
paddd m0, m1
movd eax, m0
RET
%endmacro
SAD_XMM_32x32 a
SAD_XMM_32x32 u
x86/pixelutils: add missing preprocessor wrapper to the AVX2 functions Should fix compilation with old yasm/nasm Signed-off-by: James Almer <jamrial@gmail.com>
6 years ago
%if HAVE_AVX2_EXTERNAL
avutil/pixelutils: sad_32x32 sse2/avx2 optimizations. add ff_pixelutils_sad_32x32_sse2, ff_pixelutils_sad_{a,u}_32x32_sse2, ff_pixelutils_sad_32x32_avx22, ff_pixelutils_sad_{a,u}_32x32_avx2 use perf record/report profiling, get instructions:u for avx2 sad_32x32: 72.05% pixelutils pixelutils [.] block_sad_32x32_c 18.50% pixelutils pixelutils [.] block_sad_16x16_c 4.78% pixelutils pixelutils [.] block_sad_8x8_c 2.69% pixelutils pixelutils [.] block_sad_4x4_c 0.89% pixelutils pixelutils [.] block_sad_2x2_c 0.16% pixelutils pixelutils [.] ff_pixelutils_sad_32x32_avx2 0.16% pixelutils pixelutils [.] ff_pixelutils_sad_u_32x32_avx2 0.12% pixelutils pixelutils [.] ff_pixelutils_sad_a_32x32_avx2 sse2 sad_32x32 instructions:u like: 71.86% pixelutils pixelutils [.] block_sad_32x32_c 18.42% pixelutils pixelutils [.] block_sad_16x16_c 4.81% pixelutils pixelutils [.] block_sad_8x8_c 2.68% pixelutils pixelutils [.] block_sad_4x4_c 0.88% pixelutils pixelutils [.] block_sad_2x2_c 0.29% pixelutils pixelutils [.] ff_pixelutils_sad_32x32_sse2 0.26% pixelutils pixelutils [.] ff_pixelutils_sad_u_32x32_sse2 0.23% pixelutils pixelutils [.] ff_pixelutils_sad_a_32x32_sse2 Signed-off-by: Jun Zhao <mypopydev@gmail.com>
6 years ago
;-------------------------------------------------------------------------------
; int ff_pixelutils_sad_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
;-------------------------------------------------------------------------------
INIT_YMM avx2
cglobal pixelutils_sad_32x32, 4,7,5, src1, stride1, src2, stride2
pxor m0, m0
mov r4d, 32/4
lea r5, [stride1q * 3]
lea r6, [stride2q * 3]
.loop:
movu m1, [src1q] ; row 0 of pix0
movu m2, [src2q] ; row 0 of pix1
movu m3, [src1q + stride1q] ; row 1 of pix0
movu m4, [src2q + stride2q] ; row 1 of pix1
psadbw m1, m2
psadbw m3, m4
paddd m0, m1
paddd m0, m3
movu m1, [src1q + 2 * stride1q] ; row 2 of pix0
movu m2, [src2q + 2 * stride2q] ; row 2 of pix1
movu m3, [src1q + r5] ; row 3 of pix0
movu m4, [src2q + r6] ; row 3 of pix1
psadbw m1, m2
psadbw m3, m4
paddd m0, m1
paddd m0, m3
lea src2q, [src2q + 4 * stride2q]
lea src1q, [src1q + 4 * stride1q]
dec r4d
jnz .loop
vextracti128 xm1, m0, 1
paddd xm0, xm1
pshufd xm1, xm0, 2
paddd xm0, xm1
movd eax, xm0
RET
;-------------------------------------------------------------------------------
; int ff_pixelutils_sad_[au]_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
; const uint8_t *src2, ptrdiff_t stride2);
;-------------------------------------------------------------------------------
%macro SAD_AVX2_32x32 1
INIT_YMM avx2
cglobal pixelutils_sad_%1_32x32, 4,7,3, src1, stride1, src2, stride2
pxor m0, m0
mov r4d, 32/4
lea r5, [stride1q * 3]
lea r6, [stride2q * 3]
.loop:
mov%1 m1, [src2q] ; row 0 of pix1
psadbw m1, [src1q]
mov%1 m2, [src2q + stride2q] ; row 1 of pix1
psadbw m2, [src1q + stride1q]
paddd m0, m1
paddd m0, m2
mov%1 m1, [src2q + 2 * stride2q] ; row 2 of pix1
psadbw m1, [src1q + 2 * stride1q]
mov%1 m2, [src2q + r6] ; row 3 of pix1
psadbw m2, [src1q + r5]
paddd m0, m1
paddd m0, m2
lea src2q, [src2q + 4 * stride2q]
lea src1q, [src1q + 4 * stride1q]
dec r4d
jnz .loop
vextracti128 xm1, m0, 1
paddd xm0, xm1
pshufd xm1, xm0, 2
paddd xm0, xm1
movd eax, xm0
RET
%endmacro
SAD_AVX2_32x32 a
SAD_AVX2_32x32 u
x86/pixelutils: add missing preprocessor wrapper to the AVX2 functions Should fix compilation with old yasm/nasm Signed-off-by: James Almer <jamrial@gmail.com>
6 years ago
%endif