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;******************************************************************************
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;* Pixel utilities SIMD
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;*
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;* Copyright (C) 2002-2004 Michael Niedermayer <michaelni@gmx.at>
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;* Copyright (C) 2014 Clément Bœsch <u pkh me>
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_8x8_mmxext(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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INIT_MMX mmxext
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cglobal pixelutils_sad_8x8, 4,4,0, src1, stride1, src2, stride2
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pxor m2, m2
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%rep 4
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mova m0, [src1q]
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mova m1, [src1q + stride1q]
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psadbw m0, [src2q]
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psadbw m1, [src2q + stride2q]
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paddw m2, m0
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paddw m2, m1
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lea src1q, [src1q + 2*stride1q]
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lea src2q, [src2q + 2*stride2q]
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%endrep
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movd eax, m2
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avutil/x86/pixelutils: Empty MMX state in ff_pixelutils_sad_8x8_mmxext
We currently mostly do not empty the MMX state in our MMX
DSP functions; instead we only do so before code that might
be using x87 code. This is a violation of the System V i386 ABI
(and maybe of other ABIs, too):
"The CPU shall be in x87 mode upon entry to a function. Therefore,
every function that uses the MMX registers is required to issue an
emms or femms instruction after using MMX registers, before returning
or calling another function." (See 2.2.1 in [1])
This patch does not intend to change all these functions to abide
by the ABI; it only does so for ff_pixelutils_sad_8x8_mmxext, as this
function can by called by external users, because it is exported
via the pixelutils API. Without this, the following fragment will
assert (on x86/x64):
uint8_t src1[8 * 8], src2[8 * 8];
av_pixelutils_sad_fn fn = av_pixelutils_get_sad_fn(3, 3, 0, NULL);
fn(src1, 8, src2, 8);
av_assert0_fpu();
[1]: https://raw.githubusercontent.com/wiki/hjl-tools/x86-psABI/intel386-psABI-1.1.pdf
Signed-off-by: Andreas Rheinhardt <andreas.rheinhardt@outlook.com>
1 year ago
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emms
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RET
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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INIT_XMM sse2
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cglobal pixelutils_sad_16x16, 4,4,5, src1, stride1, src2, stride2
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movu m4, [src1q]
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movu m2, [src2q]
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movu m1, [src1q + stride1q]
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movu m3, [src2q + stride2q]
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psadbw m4, m2
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psadbw m1, m3
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paddw m4, m1
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%rep 7
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lea src1q, [src1q + 2*stride1q]
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lea src2q, [src2q + 2*stride2q]
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movu m0, [src1q]
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movu m2, [src2q]
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movu m1, [src1q + stride1q]
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movu m3, [src2q + stride2q]
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psadbw m0, m2
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psadbw m1, m3
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paddw m4, m0
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paddw m4, m1
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%endrep
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movhlps m0, m4
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paddw m4, m0
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movd eax, m4
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RET
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_[au]_16x16_sse2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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%macro SAD_XMM_16x16 1
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INIT_XMM sse2
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cglobal pixelutils_sad_%1_16x16, 4,4,3, src1, stride1, src2, stride2
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mov%1 m2, [src2q]
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psadbw m2, [src1q]
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mov%1 m1, [src2q + stride2q]
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psadbw m1, [src1q + stride1q]
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paddw m2, m1
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%rep 7
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lea src1q, [src1q + 2*stride1q]
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lea src2q, [src2q + 2*stride2q]
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mov%1 m0, [src2q]
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psadbw m0, [src1q]
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mov%1 m1, [src2q + stride2q]
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psadbw m1, [src1q + stride1q]
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paddw m2, m0
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paddw m2, m1
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%endrep
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movhlps m0, m2
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paddw m2, m0
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movd eax, m2
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RET
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%endmacro
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SAD_XMM_16x16 a
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SAD_XMM_16x16 u
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%macro PROCESS_SAD_32x4_U 0
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movu m1, [r2]
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movu m2, [r2 + 16]
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movu m3, [r0]
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movu m4, [r0 + 16]
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psadbw m1, m3
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psadbw m2, m4
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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movu m1, [r2]
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movu m2, [r2 + 16]
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movu m3, [r0]
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movu m4, [r0 + 16]
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psadbw m1, m3
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psadbw m2, m4
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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movu m1, [r2]
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movu m2, [r2 + 16]
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movu m3, [r0]
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movu m4, [r0 + 16]
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psadbw m1, m3
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psadbw m2, m4
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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movu m1, [r2]
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movu m2, [r2 + 16]
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movu m3, [r0]
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movu m4, [r0 + 16]
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psadbw m1, m3
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psadbw m2, m4
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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%endmacro
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%macro PROCESS_SAD_32x4 1
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mov%1 m1, [r2]
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mov%1 m2, [r2 + 16]
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psadbw m1, [r0]
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psadbw m2, [r0 + 16]
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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mov%1 m1, [r2]
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mov%1 m2, [r2 + 16]
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psadbw m1, [r0]
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psadbw m2, [r0 + 16]
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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mov%1 m1, [r2]
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mov%1 m2, [r2 + 16]
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psadbw m1, [r0]
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psadbw m2, [r0 + 16]
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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mov%1 m1, [r2]
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mov%1 m2, [r2 + 16]
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psadbw m1, [r0]
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psadbw m2, [r0 + 16]
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paddd m1, m2
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paddd m0, m1
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lea r2, [r2 + r3]
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lea r0, [r0 + r1]
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%endmacro
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;-----------------------------------------------------------------------------
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; int ff_pixelutils_sad_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-----------------------------------------------------------------------------
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INIT_XMM sse2
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cglobal pixelutils_sad_32x32, 4,5,5, src1, stride1, src2, stride2
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pxor m0, m0
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mov r4d, 4
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.loop:
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PROCESS_SAD_32x4_U
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PROCESS_SAD_32x4_U
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dec r4d
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jnz .loop
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movhlps m1, m0
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paddd m0, m1
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movd eax, m0
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RET
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_[au]_32x32_sse2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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%macro SAD_XMM_32x32 1
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INIT_XMM sse2
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cglobal pixelutils_sad_%1_32x32, 4,5,3, src1, stride1, src2, stride2
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pxor m0, m0
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mov r4d, 4
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.loop:
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PROCESS_SAD_32x4 %1
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PROCESS_SAD_32x4 %1
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dec r4d
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jnz .loop
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movhlps m1, m0
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paddd m0, m1
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movd eax, m0
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RET
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%endmacro
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SAD_XMM_32x32 a
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SAD_XMM_32x32 u
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%if HAVE_AVX2_EXTERNAL
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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INIT_YMM avx2
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cglobal pixelutils_sad_32x32, 4,7,5, src1, stride1, src2, stride2
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pxor m0, m0
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mov r4d, 32/4
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lea r5, [stride1q * 3]
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lea r6, [stride2q * 3]
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.loop:
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movu m1, [src1q] ; row 0 of pix0
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movu m2, [src2q] ; row 0 of pix1
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movu m3, [src1q + stride1q] ; row 1 of pix0
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movu m4, [src2q + stride2q] ; row 1 of pix1
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psadbw m1, m2
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psadbw m3, m4
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paddd m0, m1
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paddd m0, m3
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movu m1, [src1q + 2 * stride1q] ; row 2 of pix0
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movu m2, [src2q + 2 * stride2q] ; row 2 of pix1
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movu m3, [src1q + r5] ; row 3 of pix0
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movu m4, [src2q + r6] ; row 3 of pix1
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psadbw m1, m2
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psadbw m3, m4
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paddd m0, m1
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paddd m0, m3
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lea src2q, [src2q + 4 * stride2q]
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lea src1q, [src1q + 4 * stride1q]
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dec r4d
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jnz .loop
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vextracti128 xm1, m0, 1
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paddd xm0, xm1
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pshufd xm1, xm0, 2
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paddd xm0, xm1
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movd eax, xm0
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RET
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;-------------------------------------------------------------------------------
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; int ff_pixelutils_sad_[au]_32x32_avx2(const uint8_t *src1, ptrdiff_t stride1,
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; const uint8_t *src2, ptrdiff_t stride2);
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;-------------------------------------------------------------------------------
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%macro SAD_AVX2_32x32 1
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INIT_YMM avx2
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cglobal pixelutils_sad_%1_32x32, 4,7,3, src1, stride1, src2, stride2
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pxor m0, m0
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mov r4d, 32/4
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lea r5, [stride1q * 3]
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lea r6, [stride2q * 3]
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.loop:
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mov%1 m1, [src2q] ; row 0 of pix1
|
|
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|
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psadbw m1, [src1q]
|
|
|
|
|
mov%1 m2, [src2q + stride2q] ; row 1 of pix1
|
|
|
|
|
psadbw m2, [src1q + stride1q]
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|
|
|
|
|
|
|
|
|
paddd m0, m1
|
|
|
|
|
paddd m0, m2
|
|
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|
|
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|
|
|
|
mov%1 m1, [src2q + 2 * stride2q] ; row 2 of pix1
|
|
|
|
|
psadbw m1, [src1q + 2 * stride1q]
|
|
|
|
|
mov%1 m2, [src2q + r6] ; row 3 of pix1
|
|
|
|
|
psadbw m2, [src1q + r5]
|
|
|
|
|
|
|
|
|
|
paddd m0, m1
|
|
|
|
|
paddd m0, m2
|
|
|
|
|
|
|
|
|
|
lea src2q, [src2q + 4 * stride2q]
|
|
|
|
|
lea src1q, [src1q + 4 * stride1q]
|
|
|
|
|
|
|
|
|
|
dec r4d
|
|
|
|
|
jnz .loop
|
|
|
|
|
|
|
|
|
|
vextracti128 xm1, m0, 1
|
|
|
|
|
paddd xm0, xm1
|
|
|
|
|
pshufd xm1, xm0, 2
|
|
|
|
|
paddd xm0, xm1
|
|
|
|
|
movd eax, xm0
|
|
|
|
|
RET
|
|
|
|
|
%endmacro
|
|
|
|
|
|
|
|
|
|
SAD_AVX2_32x32 a
|
|
|
|
|
SAD_AVX2_32x32 u
|
|
|
|
|
%endif
|
